IP Library Granted Patent US 11,270,639
Granted Patent B2
US 11,270,639 · App. 17/006,023 · Granted Mar 8, 2022

Pixel circuit and display device

Inventor: Tetsuro Yamamoto (Tokyo, JP)
Assignee: JOLED INC.
G09G3/3233G09G2300/0452G09G2310/0286G09G2310/08G09G2320/0233G09G2320/0252
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Quick Facts
Patent No.
US 11,270,639
App. No.
17/006,023
Granted
Mar 8, 2022
Kind
B2
Abstract

A pixel circuit configured to emit light based on an image signal includes: a light emitting element (organic EL element); a driver transistor configured to adjust current supplied to the light emitting element; and a write transistor connected between a signal line to which the image signal is applied and the driver transistor. The driver transistor includes: a gate electrode; a counter electrode disposed opposite the gate electrode; and a channel disposed between the gate electrode and the counter electrode. A potential applied to the counter electrode in a write period in which the write transistor conducts current in a state in which the image signal is applied to the signal line reduces a resistance value of the driver transistor to lower value than a potential applied to the counter electrode in an emission period of the light emitting element does.

Claims (14)

1. A pixel circuit configured to emit light based on an image signal, the pixel circuit comprising:

a light emitting element;

a driver transistor configured to adjust current supplied to the light emitting element; and

a write transistor connected between a signal line to which the image signal is applied and the driver transistor,

wherein the driver transistor includes:

a gate electrode;

a counter electrode disposed opposite the gate electrode; and

a channel disposed between the gate electrode and the counter electrode, and

a potential applied to the counter electrode in a write period in which the write transistor conducts current in a state in which the image signal is applied to the signal line reduces a resistance value of the driver transistor to a lower value than a potential applied to the counter electrode in an emission period of the light emitting element does,

wherein the pixel circuit further comprises a pair of switching transistors connected to the counter electrode;

wherein the potential applied to the counter electrode is selected according to ON and OFF states of the pair of switching transistors, and

wherein the pair of switching transistors includes an N-channel transistor and a P-channel transistor that share a gate.

2. The pixel circuit according to claim 1 ,

wherein a gate potential of the N-channel transistor and the P-channel transistor is equal to a gate potential of the write transistor.

Assignments (5)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jul 18, 2025
From: JDI DESIGN AND DEVELOPMENT G.K.
To: MAGNOLIA BLUE CORPORATION
Reel/Frame 072039/0656 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jan 31, 2024
From: JOLED, INC.
To: JDI DESIGN AND DEVELOPMENT G.K.
Reel/Frame 066382/0619 →
CORRECTION BY AFFIDAVIT FILED AGAINST REEL/FRAME 063396/0671 Recorded Jun 12, 2023
From: JOLED, INC.
To: JOLED, INC.
Reel/Frame 064067/0723 →
SECURITY INTEREST Recorded Apr 20, 2023
From: JOLED, INC.
To: INCJ, LTD.
Reel/Frame 063396/0671 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Aug 28, 2020
From: YAMAMOTO, TETSURO
To: JOLED INC.
Reel/Frame 053631/0342 →
Priority Claims (1)
JP JP2019-194927 · Oct 28, 2019 · national
Continuity (1)
Related Publication 20210125556A1 · Apr 29, 2021
Cited By (2)
US 12,334,008 US 12,499,836