IP Library Granted Patent US 11,347,672
Granted Patent B2
US 11,347,672 · App. 17/010,691 · Granted May 31, 2022

Storage apparatus

Inventors: Katsuya Tanaka (Tokyo, JP); Hirotoshi Akaike (Tokyo, JP)
Assignee: HITACHI, LTD.
G06F13/4022G06F15/17331
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Quick Facts
Patent No.
US 11,347,672
App. No.
17/010,691
Granted
May 31, 2022
Kind
B2
Abstract

A storage apparatus in which a controller reads out a port status of a switch in a short period of time is disclosed. The storage apparatus includes a switch and a plurality of storage controllers configured to communicate with each other through the switch. The switch includes a switch processor, a plurality of data ports, a switch integrated circuit, a memory, and a management interface. One of the plurality of data ports and a management port of the management interface are connected to each other. The switch processor stores a status of the plurality of data ports acquired from the switch integrated circuit into the memory. The plurality of storage controllers access the management interface through the plurality of data ports and the management port and receive the statuses of the plurality of data ports stored in the memory from the management interface.

Claims (38)

1. A storage apparatus, comprising:

a switch; and

a plurality of storage controllers configured to communicate with each other through the switch,

wherein the switch includes:

a switch processor,

a plurality of data ports,

a switch integrated circuit configured to perform data transfer between the data ports,

a memory, and

a management interface,

wherein one of the plurality of data ports and a management port of the management interface are connected to each other,

wherein the switch processor stores a status of the plurality of data ports acquired from the switch integrated circuit into the memory,

wherein the plurality of storage controllers access the management interface through the plurality of data ports and the management port, and receive the statuses of the plurality of data ports stored in the memory from the management interface,

wherein the plurality of storage controllers and the management interface are capable of performing data transfer by remote direct memory access,

wherein the switch processor places the statuses of the plurality of data ports into a shared memory region in the memory, and

wherein the plurality of storage controllers transmit a command for the remote direct memory access to the management interface to acquire the statuses of the plurality of data ports from the shared memory region.

2. The storage apparatus according to claim 1 , wherein

data transfer between the plurality of storage controllers and the management interface is set to a priority degree higher than that of data transfer between the plurality of storage controllers.

3. The storage apparatus according to claim 1 , wherein

a virtual network that performs data transfer between the plurality of storage controllers and the management interface is different from a virtual network that performs data transfer between the plurality of storage controllers.

4. The storage apparatus according to claim 1 , wherein

a frequency band of a link that connects the one of the plurality of data ports with the management port is smaller than a frequency band of links that connect the plurality of storage controllers with the plurality of data ports to each other.

5. The storage apparatus according to claim 1 , wherein

the management interface further includes an Ethernet port connected to a management network.

6. The storage apparatus according to claim 1 , wherein

the plurality of storage controllers instruct the switch processor to change the state of the plurality of data ports.

7. A method of reading out a data port status of a switch in a storage apparatus including a switch, and a plurality of storage controllers configured to communicate with each other through the switch, the switch including a switch processor, a plurality of data ports, a switch integrated circuit configured to perform data transfer between the data ports, a memory, and a management interface, one of the plurality of data ports and a management port of the management interface being connected to each other, the method comprising:

storing, by the switch processor, a status of the plurality of data ports acquired from the switch integrated circuit into the memory;

accessing, by the plurality of storage controllers, the management interface through the plurality of data ports and the management port, and receiving the statuses of the plurality of data ports stored in the memory from the management interface;

placing, by the switch processor, the statuses of the plurality of data ports into a shared memory region in the memory; and

transmitting, by the plurality of storage controllers, a command for the remote direct memory access to the management interface to acquire the statuses of the plurality of data ports from the shared memory region.

8. The method according to claim 7 , further comprising:

instructing, by the plurality of storage controllers, the switch processor to change a state of the plurality of data ports.

9. The method according to claim 7 , wherein

data transfer between the plurality of storage controllers and the management interface is set to a priority degree higher than that of data transfer between the plurality of storage controllers.

10. The method according to claim 7 , wherein

a virtual network that performs data transfer between the plurality of storage controllers and the management interface is different from a virtual network that performs data transfer between the plurality of storage controllers.

11. The method according to claim 7 , wherein

a frequency band of a link that connects the one of the plurality of data ports with the management port is smaller than a frequency band of links that connect the plurality of storage controllers with the plurality of data ports to each other.

Assignments (2)
COMPANY SPLIT Recorded Aug 20, 2024
From: HITACHI, LTD.
To: HITACHI VANTARA, LTD.
Reel/Frame 069518/0761 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Sep 2, 2020
From: TANAKA, KATSUYA; AKAIKE, HIROTOSHI
To: HITACHI, LTD.
Reel/Frame 053678/0327 →
Priority Claims (1)
JP JP2020-090612 · May 25, 2020 · national
Continuity (1)
Related Publication 20210365397A1 · Nov 25, 2021
Cited By (1)
US 12,210,781