Memory device comprising silicon oxide layer and conductor sharing a dopant
According to one embodiment, a method of manufacturing a memory device including a silicon oxide and a variable resistance element electrically coupled to the silicon oxide, includes: introducing a dopant into the silicon oxide from a first surface of the silicon oxide by ion implantation; and etching the first surface of the silicon oxide with an ion beam.
1. A memory device comprising:
a variable resistance element;
an electrical element electrically coupled to the variable resistance element and including a first electrode and a silicon oxide,
wherein:
the silicon oxide includes a first surface and a second surface that are opposed to each other,
the silicon oxide is in contact with the first electrode on the second surface,
the silicon oxide and the first electrode contain a dopant, and
the dopant has a first concentration in the first surface of the silicon oxide that is higher than one eighth of a maximum concentration in the silicon oxide, and continues to increase from the first concentration to the maximum concentration toward the second surface.
2. A memory device comprising:
a variable resistance element;
an electrical element electrically coupled to the variable resistance element and including a silicon oxide containing a dopant; and
a conductor that is in contact with the silicon oxide, that contains the dopant, and that contains argon, krypton, or xenon.
3. The device of claim 2 , wherein:
the conductor includes a first surface and a second surface that are opposed to each other,
the silicon oxide includes a third surface which is in contact with the second surface of the conductor, and
a concentration of the dopant increases in the conductor from the first surface of the conductor toward the second surface of the conductor, and increases in the silicon oxide from the third surface in a direction away from the third surface.
4. The device of claim 2 , wherein:
the silicon oxide includes a first surface which is in contact with the conductor, and
an arithmetic mean roughness of the first surface of the silicon oxide is at most 0.3 nm.
5. The device of claim 2 , wherein the variable resistance element has one of two resistances that differ from each other in a steady state.
6. The device of claim 2 , wherein the variable resistance element includes a first ferromagnetic layer, a second ferromagnetic layer, and an insulating layer between the first ferromagnetic layer and the second ferromagnetic layer.
7. A memory device comprising:
a variable resistance element;
an electrical element electrically coupled to the variable resistance element and including a silicon oxide containing a dopant that includes arsenic, germanium, or antimony; and
a conductor that is in contact with the silicon oxide and that contains the dopant.
8. The device of claim 7 , wherein:
the conductor includes a first surface and a second surface that are opposed to each other,
the silicon oxide includes a third surface which is in contact with the second surface of the conductor, and
a concentration of the dopant increases in the conductor from the first surface of the conductor toward the second surface of the conductor, and increases in the silicon oxide from the third surface in a direction away from the third surface.
9. The device of claim 7 , wherein:
the silicon oxide includes a first surface which is in contact with the conductor, and
an arithmetic mean roughness of the first surface of the silicon oxide is at most 0.3 nm.
10. The device of claim 7 , wherein the variable resistance element has one of two resistances that differ from each other in a steady state.
11. The device of claim 7 , wherein the variable resistance element includes a first ferromagnetic layer, a second ferromagnetic layer, and an insulating layer between the first ferromagnetic layer and the second ferromagnetic layer.