IP Library Granted Patent US 11,594,468
Granted Patent B2
US 11,594,468 · App. 17/018,255 · Granted Feb 28, 2023

Evaporator stacks and electronic assemblies

Inventors: Thomas J. Roan (Fargo, ND); Brij N. Singh (West Fargo, ND); Gilberto Moreno (Thornton, CO); Kevin Scott Bennion (Littleton, CO)
Assignees: DEERE & COMPANY; ALLIANCE FOR SUSTAINABLE ENERGY, LLC
H01L23/427F28D15/0233H01L23/4332F28D15/0266F28D15/046
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Quick Facts
Patent No.
US 11,594,468
App. No.
17/018,255
Granted
Feb 28, 2023
Kind
B2
Abstract

Provided is an evaporator stack. The evaporator stack may be used in power-dense electronic assemblies. The evaporator stack includes a lower floor including at least one mounded portion, and an enclosure surrounding the lower floor, wherein a height of the enclosure is greater than a height of the at least one mounded portion, the at least one mounded portion extending between two walls of the enclosure.

Claims (55)

1. An evaporator stack comprising:

a lower floor including at least one mounded portion; and

an enclosure surrounding the lower floor, wherein a height of the enclosure is greater than a height of the at least one mounded portion, the at least one mounded portion extending from a first vertical wall to a second vertical wall of the enclosure,

wherein an outlet of the evaporator stack is above the at least one mounded portion.

2. The evaporator stack of claim 1 , wherein the enclosure comprises:

a third vertical wall; and

a fourth vertical wall facing the third vertical wall, wherein

the first vertical wall faces the second vertical wall.

3. The evaporator stack of claim 2 , wherein the first vertical wall intersects the third vertical wall, the third vertical wall intersects the second vertical wall, and the fourth vertical wall intersects the first vertical wall.

4. The evaporator stack of claim 2 , wherein

the lower floor includes a plurality of flat portions,

the third vertical wall is adjacent to a first flat portion of the plurality of flat portions, and

the fourth vertical wall is adjacent to a second flat portion of the plurality of flat portions.

5. The evaporator stack of claim 1 , wherein

the lower floor includes at least one flat portion, and

an edge between at least one of the at least one flat portion and at least one of the at least one mounded portion is curved.

6. The evaporator stack of claim 1 , wherein the enclosure and the lower floor are integrally formed.

7. The evaporator stack of claim 1 , wherein the enclosure includes a metallic material, the metallic material including copper, aluminum, gold, alloys thereof, a sub-combination thereof, or a combination thereof.

8. The evaporator stack of claim 7 , further comprising:

a microporous layer including a powdered carbon in a matrix, the microporous layer on surfaces of the metallic material.

9. The evaporator stack of claim 1 , wherein the enclosure includes a third vertical wall, and fourth vertical wall facing the third vertical wall, wherein the first vertical wall faces the second vertical wall, and the evaporator stack further comprises:

a first inclined wall on the first vertical wall;

a second inclined wall on the third vertical wall;

a third inclined wall on the second vertical wall; and

a fourth inclined wall on the fourth vertical wall, wherein

the first inclined wall and the third inclined wall are inclined in a direction toward each other, and

the second inclined wall and the fourth inclined wall are inclined in a direction towards each other.

10. The evaporator stack of claim 9 , further comprising:

a ringed wall on the first inclined wall, the ringed wall having a substantially cylindrical shape.

11. The evaporator stack of claim 9 , further comprising:

a first inclined beveled portion between the first inclined wall and the second inclined wall.

12. The evaporator stack of claim 9 , wherein the first vertical wall, the second vertical wall, the third vertical wall, and the fourth vertical wall are not inclined with respect to each other.

13. The evaporator stack of claim 9 , wherein a length of the first vertical wall is based on a dimension of a semiconductor device.

14. The evaporator stack of claim 9 , further comprising:

a first beveled vertical portion between the first vertical wall and the third vertical wall.

15. The evaporator stack of claim 9 , wherein

a top surface of the first vertical wall is planar with a top surface of the third vertical wall, and

a bottom surface of the first vertical wall is lower than a bottom surface of the third vertical wall.

16. An evaporator stack comprising:

a lower floor;

an enclosure surrounding the lower floor; and

a plurality of linear fins extending horizontally on the lower floor,

the lower floor comprises at least one flat portion and at least one mounded portion, and

a height of at least one of the plurality of linear fins is greater than a height of the at least one mounded portion, the height of the at least one of the plurality of linear fins is less than a height of the enclosure, and the at least one mounded portion runs from a first vertical wall to a second vertical wall of the enclosure.

17. The evaporator stack of claim 16 , wherein the plurality of linear fins extend parallel to one another.

18. An electronic assembly comprising:

at least one semiconductor device including at least one of a silicon power semiconductor chip, a silicon carbide power semiconductor chip, or a gallium nitride power semiconductor chip; and

an evaporator stack on the at least one semiconductor device, the evaporator stack including,

a lower floor including at least one mounded portion, and

an enclosure surrounding the lower floor and connected to the at least one mounded portion,

a height of the enclosure being greater than a height of the at least one mounded portion, wherein

the at least one mounded portion extends from a first vertical wall to a second vertical wall of the enclosure, and

an outlet of the evaporator stack is above the at least one mounded portion.

19. The electronic assembly of claim 18 , further comprising:

interconnects connecting the at least one semiconductor device to at least one of a DC bus capacitor or DC and AC ports.

Assignments (5)
CHANGE OF NAME Recorded Dec 16, 2025
From: ALLIANCE FOR SUSTAINABLE ENERGY, LLC
To: ALLIANCE FOR ENERGY INNOVATION, LLC
Reel/Frame 073993/0276 →
CONFIRMATORY ASSIGNMENT Recorded Feb 23, 2022
From: ROAN, THOMAS J; SINGH, BRIJ N
To: DEERE & COMPANY
Reel/Frame 059219/0579 →
CONFIRMATORY LICENSE Recorded Apr 8, 2021
From: DEERE & COMPANY ON BEHALF OF SUBRECIPIENT, JOHN DEERE ELECTRONIC SOLUTIONS, INC.
To: U.S. DEPARTMENT OF ENERGY
Reel/Frame 055873/0680 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Dec 30, 2020
From: ROAN, THOMAS J.; SINGH, BRIJ N.
To: DEERE & COMPANY
Reel/Frame 054779/0851 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Oct 1, 2020
From: MORENO, GILBERTO; BENNION, KEVIN SCOTT
To: ALLIANCE FOR SUSTAINABLE ENERGY, LLC
Reel/Frame 053944/0365 →