IP Library Granted Patent US 11,621,275
Granted Patent B2
US 11,621,275 · App. 17/020,457 · Granted Apr 4, 2023

Three-dimensional memory device with hydrogen-rich semiconductor channels

Inventors: Kun Zhang (Wuhan, CN); Wenxi Zhou (Wuhan, CN); Zhiliang Xia (Wuhan, CN); Zongliang Huo (Wuhan, CN)
Assignee: YANGTZE MEMORY TECHNOLOGIES CO., LTD.
H01L27/11582H01L27/1157H01L27/11521H01L27/11524H01L27/11526H01L27/11556H01L27/11568H01L27/11573
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Quick Facts
Patent No.
US 11,621,275
App. No.
17/020,457
Granted
Apr 4, 2023
Kind
B2
Abstract

Embodiments of 3D memory devices and methods for forming the same are disclosed. In an example, a 3D memory device includes a memory stack including interleaved stack conductive layers and stack dielectric layers, a semiconductor layer, a plurality of channel structures each extending vertically through the memory stack into the semiconductor layer, and an insulating structure extending vertically through the memory stack and including a dielectric layer doped with at least one of hydrogen or an isotope of hydrogen.

Claims (28)

1. A three-dimensional (3D) memory device, comprising:

a memory stack comprising interleaved stack conductive layers and stack dielectric layers;

a semiconductor layer;

a plurality of channel structures each extending vertically through the memory stack into the semiconductor layer; and

an insulating structure located extending vertically through the memory stack and at a distance away from adjacent channel structures, and comprising a dielectric layer doped with at least one of hydrogen or an isotope of hydrogen.

2. The 3D memory device of claim 1 , wherein an atomic percent of the at least one of hydrogen or an isotope of hydrogen in the dielectric layer is not greater than about 50%.

3. The 3D memory device of claim 2 , wherein the atomic percent of the at least one of hydrogen or an isotope of hydrogen in the dielectric layer is between about 1% and about 10%.

4. The 3D memory device of claim 2 , wherein an atomic percent of the at least one of hydrogen or isotope of hydrogen in the semiconductor channel is less than or equal to the atomic percent of the at least one of hydrogen or isotope of hydrogen in the dielectric layer.

5. The 3D memory device of claim 1 , wherein the dielectric layer comprises silicon nitride.

6. The 3D memory device of claim 1 , wherein the insulating structure further comprises a first silicon oxide layer laterally between the dielectric layer and the stack conductive layers of the memory stack.

7. The 3D memory device of claim 6 , wherein the insulating structure further comprises a second silicon oxide layer, wherein the dielectric layer is laterally between the first and second silicon oxide layers.

8. The 3D memory device of claim 6 , wherein the insulating structure further comprises a polysilicon layer, wherein the dielectric layer is laterally between the first silicon oxide layer and the polysilicon layer.

9. The 3D memory device of claim 1 , wherein the insulating structure further comprises a silicon oxide cap at one end of the insulating structure.

10. The 3D memory device of claim 1 , wherein one end of the insulating structure is flush with a respective end of the dielectric layer.

11. The 3D memory device of claim 1 , wherein the semiconductor layer comprises one or more doped silicon layers.

12. The 3D memory device of claim 1 , wherein each of the channel structures comprises a memory film and a semiconductor channel doped with the at least one of hydrogen or an isotope of hydrogen.

13. The 3D memory device of claim 12 , wherein the semiconductor channel comprises polysilicon.

14. The 3D memory device of claim 1 , wherein the insulating structure extends laterally to separate the plurality of channel structures into a plurality of memory blocks.

15. The 3D memory device of claim 1 , further comprising a source contact in contact with the semiconductor layer, wherein the source contact and the insulating structure are on opposite sides of the semiconductor layer.

16. The 3D memory device of claim 1 , further comprising a source contact in contact with the semiconductor layer, wherein the source contact and the insulating structure are on a same side of the semiconductor layer.

17. A three-dimensional (3D) memory device, comprising:

a memory stack comprising interleaved stack conductive layers and stack dielectric layers;

a semiconductor layer;

a plurality of channel structures each extending vertically through the memory stack into the semiconductor layer, wherein each of the channel structures comprises a memory film and a semiconductor channel doped with at least one of hydrogen or an isotope of hydrogen; and

an insulating structure extending vertically through the memory stack and at a distance away from adjacent channel structures, and comprising a dielectric layer doped with the at least one of hydrogen or the isotope of hydrogen.

18. The 3D memory device of claim 17 , wherein the insulating structure extends laterally to separate the plurality of channel structures into a plurality of memory blocks.

19. The 3D memory device of claim 17 , wherein the dielectric layer comprises silicon nitride.

20. The 3D memory device of claim 17 , wherein an atomic percent of the at least one of hydrogen or isotope of hydrogen in the semiconductor channel is less than or equal to an atomic percent of the at least one of hydrogen or isotope of hydrogen in the dielectric layer.

Assignments (1)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Sep 14, 2020
From: ZHANG, KUN; ZHOU, WENXI; XIA, ZHILIANG; HUO, ZONGLIANG
To: YANGTZE MEMORY TECHNOLOGIES CO., LTD.
Reel/Frame 053766/0030 →
Continuity (2)
Continuation PCTCN2020105686 · Jul 30, 2020
Related Publication 20220037352A1 · Feb 3, 2022