IP Library Granted Patent US 11,942,565
Granted Patent B2
US 11,942,565 · App. 17/021,930 · Granted Mar 26, 2024

Solar cell emitter region fabrication using substrate-level ion implantation

Inventors: Staffan Westerberg (Sunnyvale, CA); Timothy Weidman (Sunnyvale, CA); David D. Smith (Campbell, CA)
Assignee: Maxeon Solar Pte. Ltd.
H01L31/1864H01L31/0682H01L31/1804Y02E10/547Y02P70/50
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Quick Facts
Patent No.
US 11,942,565
App. No.
17/021,930
Granted
Mar 26, 2024
Kind
B2
Abstract

Methods of fabricating solar cell emitter regions using substrate-level ion implantation, and resulting solar cells, are described. In an example, a method of fabricating a solar cell involves forming a lightly doped region in a semiconductor substrate by ion implantation, the lightly doped region of a first conductivity type of a first concentration. The method also involves forming a first plurality of dopant regions of the first conductivity type of a second, higher, concentration by ion implantation, the first plurality of dopant regions overlapping with a first portion of the lightly doped region. The method also involves forming a second plurality of dopant regions by ion implantation, the second plurality of dopant regions having a second conductivity type of a concentration higher than the first concentration, and the second plurality of dopant regions overlapping with a second portion of the lightly doped region and alternating with but not overlapping the first plurality of dopant regions.

Claims (36)

1. A method of fabricating a solar cell, the method comprising:

forming a lightly doped region in a semiconductor substrate by a first ion implantation, the lightly doped region of a first conductivity type of a first concentration;

forming a first plurality of dopant regions of the first conductivity type of a second, higher, concentration by a second ion implantation, the first plurality of dopant regions overlapping with a first portion of the lightly doped region;

forming a second plurality of dopant regions by a third ion implantation, the second plurality of dopant regions having a second conductivity type of a concentration higher than the first concentration, and the second plurality of dopant regions overlapping with a second portion of the lightly doped region and alternating with but not overlapping the first plurality of dopant regions;

thermally annealing the semiconductor substrate subsequent to the third ion implantation;

forming a tunneling dielectric layer on a light-receiving surface of the semiconductor substrate;

forming a doped amorphous silicon layer on the tunneling dielectric layer on the light-receiving surface of the semiconductor substrate prior to the thermally annealing the semiconductor substrate; and

crystallizing the doped amorphous silicon layer during the thermally annealing the semiconductor substrate to form a doped polycrystalline silicon layer on the light-receiving surface of the semiconductor substrate.

2. The method of claim 1 , wherein forming the lightly doped region and forming the first plurality of dopant regions comprises implanting dopants during a single pass under a stationary mask in an implanter.

3. The method of claim 2 , wherein implanting dopants during the single pass under the stationary mask comprises using a mask having a slit pattern for forming the first plurality of dopant regions and a full opening for forming the lightly doped region.

4. The method of claim 1 , wherein the thermally annealing the semiconductor substrate comprises thermally annealing the semiconductor in an atmosphere substantially comprising nitrogen (N2).

5. The method of claim 1 , wherein forming the lightly doped region comprises forming a blanket lightly doped region in the semiconductor substrate.

6. The method of claim 1 , wherein forming the lightly doped region comprises forming patterned lightly doped regions in the semiconductor substrate.

7. The method of claim 1 , further comprising:

forming a first plurality of contacts electrically connected to the first plurality of dopant regions; and

forming a second plurality of contacts electrically connected to the second plurality of dopant regions.

8. A method of fabricating a solar cell, the method comprising:

forming a lightly doped region in a back surface of the semiconductor substrate by ion implantation, the lightly doped region of a first conductivity type of a first concentration, wherein the back surface is opposite a light-receiving surface of the semiconductor substrate;

forming a first plurality of dopant regions of the first conductivity type of a second, higher, concentration by ion implantation, the first plurality of dopant regions overlapping with a first portion of the lightly doped region;

forming a second plurality of dopant regions by ion implantation, the second plurality of dopant regions having a second conductivity type of a concentration higher than the first concentration, and the second plurality of dopant regions overlapping with a second portion of the lightly doped region and alternating with but not overlapping the first plurality of dopant regions;

forming a tunneling dielectric layer on a light-receiving surface of the semiconductor substrate;

forming a doped amorphous silicon layer on the tunneling dielectric layer on the light-receiving surface of the semiconductor substrate prior to the thermally annealing the semiconductor substrate; and

crystallizing the doped amorphous silicon layer during the thermally annealing the semiconductor substrate to form a doped polycrystalline silicon layer on the light-receiving surface of the semiconductor substrate.

9. The method of claim 8 , wherein forming the lightly doped region and forming the first plurality of dopant regions comprises implanting dopants during a single pass under a stationary mask in an implanter.

10. The method of claim 9 , wherein implanting dopants during the single pass under the stationary mask comprises using a mask having a slit pattern for forming the first plurality of dopant regions and a full opening for forming the lightly doped region.

11. The method of claim 8 , further comprising:

thermally annealing the semiconductor substrate subsequent to the forming the second plurality of dopant regions by ion implantation.

12. The method of claim 11 , wherein the thermally annealing the semiconductor substrate comprises thermally annealing the semiconductor in an atmosphere substantially comprising nitrogen (N2).

13. The method of claim 8 , wherein forming the lightly doped region comprises forming a blanket lightly doped region in the semiconductor substrate.

14. The method of claim 8 , wherein forming the lightly doped region comprises forming patterned lightly doped regions in the semiconductor substrate.

15. The method of claim 8 , further comprising:

forming a first plurality of contacts electrically connected to the first plurality of dopant regions; and

forming a second plurality of contacts electrically connected to the second plurality of dopant regions.

16. The method of claim 8 , wherein the first conductivity type is P-type.

17. The method of claim 8 , wherein the second conductivity type is N-type.

18. The method of claim 8 , wherein forming the doped amorphous silicon layer comprises using plasma enhanced chemical vapor deposition to form the doped amorphous silicon layer.

Assignments (5)
SECURITY INTEREST Recorded Jun 27, 2024
From: MAXEON SOLAR PTE. LTD.
To: DB TRUSTEES (HONG KONG) LIMITED
Reel/Frame 067924/0062 →
SECOND LIEN SECURITY INTEREST AGREEMENT Recorded Jun 26, 2024
From: MAXEON SOLAR PTE. LTD
To: DB TRUSTEES (HONG KONG) LIMITED
Reel/Frame 071343/0553 →
SECURITY INTEREST Recorded Jun 5, 2024
From: MAXEON SOLAR PTE. LTD.
To: DB TRUSTEES (HONG KONG) LIMITED
Reel/Frame 067637/0598 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jan 24, 2023
From: SUNPOWER CORPORATION
To: MAXEON SOLAR PTE. LTD.
Reel/Frame 062699/0875 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Sep 16, 2020
From: WESTERBERG, STAFFAN; WEIDMAN, TIMOTHY; SMITH, DAVID D.
To: SUNPOWER CORPORATION
Reel/Frame 053787/0600 →