Granted Patent B2

US 11,366,750 · App. 17/030,545 · Granted Jun 21, 2022

Inventors: Alex Soukhman (Raanana, IL); Uri Shabi (Tel Mond, IL); Bar David (Rishon Lezion, IL)

Assignee: EMC IP Holding Company LLC

G06F12/0246G06F12/0822G06F12/0824G06F12/0833G06F12/0882G06F2212/7201G06F2212/7207

Abstract

Claims (49)

1. A method of caching comprising:

determining an update to a first data page of a first cache on a first node, wherein a second node includes a second cache and wherein the second cache includes a copy of the first data page;

determining, in accordance with one or more criteria, whether to send the update from the first node to the second node;

responsive to determining, in accordance with the one or more criteria, to send the update, sending the update from the first node to the second node; and

responsive to determining not to send the update, sending an invalidate request from the first node to the second node, wherein the invalidate request instructs the second node to invalidate the copy of the first data page stored in the second cache of the second node.

2. The method of claim 1 , wherein the update includes one or more modifications to the first data page.

3. The method of claim 1 , further comprising:

applying the update to the first data page of the first cache on the first node, wherein the first data page of the first cache of the first node includes a current content prior to applying the update and wherein the first data page of the first cache of the first node includes an updated content after applying said update to the current content.

4. The method of claim 3 , wherein said determining the update further comprises:

determining a result of performing a bit wise logical exclusive XOR operation of the current content and the updated content.

5. The method of claim 4 , wherein said sending the update includes sending the result as the update from the first node to the second node.

6. The method of claim 5 , wherein the copy of the first page is stored in a first cache location of the second cache of the second node, and wherein the method includes the second node performing first processing comprising:

receiving the result from the first node;

determining, in accordance with the result, the updated content of the first page; and

updating the first cache location of the second cache of the second node by storing the updated content of the first page at the first cache location of the second cache of the second node.

7. The method of claim 4 , wherein said determining the update further comprises:

determining a compressed result by compressing the result of the bit wise logical exclusive XOR operation of the current content and the updated content.

8. The method of claim 7 , wherein said sending the update includes sending the compressed result as the update from the first node to the second node.

9. The method of claim 8 , wherein the copy of the first page is stored in a first cache location of the second cache of the second node, and wherein the method includes the second node performing first processing comprising:

receiving the compressed result from the first node;

determining, in accordance with the compressed result, the updated content of the first page; and

updating the first cache location of the second cache of the second node by storing the updated content of the first page at the first cache location of the second cache of the second node.

10. The method of claim 1 , wherein the one or more criteria indicates to send the update from the first node to the second node if the update has a size that is less than a specified threshold.

11. The method of claim 1 , wherein the one or more criteria indicates to send the update from the first node to the second node if the update is associated with a logical address of a logical device and the logical device is designated as performance critical.

12. The method of claim 1 , wherein the one or more criteria indicates to send the update from the first node to the second node if the update is associated with a logical address included in a logical address subrange of a logical device and the logical address subrange of the logical device is designated as performance critical.

13. The method of claim 1 , wherein the method is performed in connection with data deduplication of a candidate data block that is a duplicate of an existing target data block, wherein the target data block is stored at a first logical address of a first logical device, and wherein the candidate data block is stored at a second logical address of a second logical device.

14. The method of claim 13 , wherein the first data page is a first metadata page including metadata associated with a second logical address of the second logical device;

wherein prior to the data deduplication of the candidate block, the first logical address of the first logical device is mapped to the existing target data block and the second logical address of the second logical device is not mapped to the existing target data block;

wherein after the data deduplication of the candidate block, the second logical address of the second logical device is mapped to the existing target data block and the first logical address of the first logical device is mapped to the existing target data block; and

wherein the update includes a first data modification to the first metadata page and wherein the first data modification includes an incremented value of a reference count denoting a number of times the existing target data block is mapped to a logical address.

15. The method of claim 14 , wherein a metadata structure includes the first metadata page, a second metadata page, and a third metadata page, wherein the first metadata page includes a first entry that references the existing target data block and wherein the first entry includes the reference counter denoting the number of times the existing target data block is mapped to a logical address, wherein the second metadata page includes a second entry associated with the first logical address of the first logical device and the second entry references the first entry, and wherein the third metadata page includes a third entry associated with the second logical address of the second logical device and the third entry references the first entry.

16. The method of claim 15 , wherein the method includes:

determining a second update to the third metadata page and wherein the second update includes a pointer from the third entry of the third metadata page to the first entry of the first metadata page;

determining, in accordance with the one or more criteria, whether to send the second update from the first node to the second node;

responsive to determining, in accordance with the one or more criteria, to send the second update, sending the second update from the first node to the second node; and

responsive to determining not to send the second update, sending a second invalidate request from the first node to the second node, wherein the second invalidate request instructs the second node to invalidate the copy of the third metadata page stored in the second cache of the second node.

17. The method of claim 16 , wherein the metadata structure is used to access data stored at logical addresses of one or more logical devices.

18. A system comprising:

one or more processors; and

a memory comprising code stored thereon that, when executed, performs a method of caching comprising:

determining an update to a first data page of a first cache on a first node, wherein a second node includes a second cache and wherein the second cache includes a copy of the first data page;

determining, in accordance with one or more criteria, whether to send the update from the first node to the second node;

responsive to determining, in accordance with the one or more criteria, to send the update, sending the update from the first node to the second node; and

responsive to determining not to send the update, sending an invalidate request from the first node to the second node, wherein the invalidate request instructs the second node to invalidate the copy of the first data page stored in the second cache of the second node.

19. A non-transitory computer readable memory comprising code stored thereon that, when executed, performs a method of caching comprising:

determining an update to a first data page of a first cache on a first node, wherein a second node includes a second cache and wherein the second cache includes a copy of the first data page;

determining, in accordance with one or more criteria, whether to send the update from the first node to the second node;

responsive to determining, in accordance with the one or more criteria, to send the update, sending the update from the first node to the second node; and

responsive to determining not to send the update, sending an invalidate request from the first node to the second node, wherein the invalidate request instructs the second node to invalidate the copy of the first data page stored in the second cache of the second node.

Assignments (9)