Dual circuit digital isolator
An apparatus, comprising: a substrate; a coupling capacitor that is formed over the substrate; and an isolator that is formed between the substrate and the coupling capacitor, the isolator including: (a) an MP-well layer, (b) a first well layer, (c) an epi tub layer that is nested in the MP-well layer and the first well layer, and (d) a second well layer that is nested in the epi tub layer.
1. An apparatus, comprising:
a substrate;
a coupling capacitor that is formed over the substrate; and
an isolator that is formed between the substrate and the coupling capacitor, the isolator including: (a) an MP-well layer, (b) a first well layer, (c) an epi tub layer that is nested in the MP-well layer and the first well layer, and (d) a second well layer that is nested in the epi tub layer.
2. The apparatus of claim 1 , wherein the first well layer is a P-well layer and the second well layer is a P-well layer.
3. The apparatus of claim 1 , wherein the first well layer is an N-well layer and the second well layer is an N-well layer.
4. The apparatus of claim 1 , wherein the second well layer is biased negatively with respect to the epi tub layer.
5. The apparatus of claim 1 , further comprising a PBL layer that is formed between the isolator and the substrate, wherein the epi tub layer is biased positively with respect to the PBL layer.
6. The apparatus of claim 1 , further comprising an electronic circuit that is formed over the substrate, the electronic circuit being coupled to the coupling capacitor.
7. An apparatus, comprising:
a substrate;
a coupling capacitor that is formed over the substrate; and
an isolator that is formed between the substrate and the coupling capacitor, the isolator including: (a) an MP-well layer, (b) a first well layer, (c) an epi tub layer that is nested in the MP-well layer and the first well layer, and (d) a second well layer that is nested in the epi tub layer.
8. The apparatus of claim 7 , further comprising an electronic circuit that is formed over the substrate, the electronic circuit being coupled to the coupling capacitor.
9. The apparatus of claim 7 , wherein the isolator further includes a field oxide layer that is nested in the n-well layer.
10. The apparatus of claim 7 , wherein the isolator further includes a field oxide layer that is nested in the n-well layer and the coupling capacitor is formed over the field oxide layer.
11. The apparatus of claim 7 , wherein the field oxide layer includes a bottom surface and a plurality of sidewalls, each of the bottom surface and the plurality of sidewalls being adjacent to the epi tub layer.
12. The apparatus of claim 7 , further comprising a dielectric layer that is disposed between the isolator and the coupling capacitor.
13. The apparatus of claim 7 , further comprising a PBL layer that is formed between the isolator and the substrate.