Display device
A liquid crystal display device according to FFS technology is provided, which sufficiently provides a common electrode with common electric potential and improves an aperture ratio of pixels. A pixel electrode is formed of a first layer transparent electrode. A common electrode made of a second layer transparent electrode is formed above the pixel electrode interposing an insulation film between them. The common electrode in an upper layer is provided with a plurality of slits. The common electrode extends over all the pixels in a display region. An end of the common electrode is disposed on a periphery of the display region and connected with a peripheral common electric potential line that provides a common electric potential Vcom. There is provided neither an auxiliary common electrode line nor a pad electrode, both of which are provided in a liquid crystal display device according to a conventional art.
1. A display device comprising:
a first substrate;
a second substrate; and
a liquid crystal layer disposed between the first substrate and the second substrate, the first substrate comprising:
a plurality of pixels arranged in a display portion, each of the pixels including a pixel electrode;
a plurality of thin film transistors, each electrically connected to a corresponding one of the pixel electrodes;
a plurality of signal lines electrically connected to the thin film transistors;
a common electrode opposed to the pixel electrodes, the liquid crystal layer being controlled by an electric field between the pixel electrodes and the common electrode;
a first insulating film interposed between the pixel electrodes and the common electrode;
a second insulating film disposed under the common electrode and the pixel electrodes;
a first common line being disposed along at least one side of the display portion and intersecting the signal lines, in plan view;
a plurality of contact holes each electrically coupling the first common line and the common electrode;
a plurality of gate lines electrically connected to the thin film transistors;
a second common line being disposed along at least another side of the display portion and intersecting the gate lines, in plan view, a plurality of contact holes each electrically coupling the second common line and the common electrode; and
a bridge that is disposed at an intersection of the first common line and one of the signal lines, the bridge being formed in a same layer as the gate lines, wherein the common electrode overlaps the entire area of the display portion,
wherein
the contact holes are arranged in a first direction along the first common line in such a manner that a distance between the contact holes in the first direction is less than a length of each pixel in the first direction, and
the contact holes are arranged in a second direction along the second common line in such a manner that a distance between the contact holes in the second direction is less than a length of each pixel in the second direction.
2. The display device according to claim 1 ,
wherein second the common line intersects the gate lines in plan view.
3. The display device according to claim 2 , further comprising:
a signal line control circuit configured to provide a display signal to each of the signal lines; and
a gate line control circuit configured to provide a gate signal to each of the gate lines,
wherein
the signal line control circuit is disposed between the display portion and the first common line, and
the gate line control circuit is disposed between the display portion and the second common line.
4. The display device according to claim 1 , wherein the first common line and the second common line are formed of a same layer as the signal lines.
5. The display device according to claim 1 , wherein the common electrode is closer to the liquid crystal layer than the first common line, the second common line, and the signal lines in a sectional view.
6. The display device according to claim 1 , wherein the first substrate comprises the entire portion of the first common line and the second common line in plan view.
7. The display device according to claim 1 , wherein the pixel electrode is under the common electrode.
8. The display device according to claim 1 , wherein the pixel electrode is above the common electrode.
9. The display device according to claim 1 , wherein the first common line and the second common line are disposed in an area where the pixels are not formed in plan view.
10. A display device comprising:
a first substrate;
a second substrate; and
a liquid crystal layer disposed between the first substrate and the second substrate, the first substrate comprising:
a plurality of pixels arranged in a display portion, each of the pixels including a pixel electrode;
a plurality of thin film transistors, each electrically connected to a corresponding one of the pixel electrodes;
a plurality of signal lines electrically connected to the thin film transistors;
a common electrode opposed to the pixel electrodes;
a first insulating film interposed between the pixel electrodes and the common electrode;
a second insulating film disposed under the common electrode and the pixel electrodes;
a first common line disposed between the first substrate and the second insulating film, and extending in a first direction along at least one side of the display portion;
a plurality of contact holes each electrically coupling the first common line and the common electrode;
a plurality of gate lines electrically connected to the thin film transistors; and
a second common line disposed between the first substrate and the second insulating film, and extending in a second direction crossing the first direction, along at least another side of the display portion, a plurality of contact holes each electrically coupling the second common line and the common electrode,
wherein
the contact holes are arranged in the first direction along the first common line in such a manner that a distance between the contact holes in the first direction is less than a length of each pixel in the first direction, and
wherein the contact holes are arranged in the second direction along the second common line in such a manner that a distance between the contact holes in the second direction is less than a length of each pixel in the second direction.
11. The display device according to claim 10 , wherein the second common line intersects the gate lines in plan view.
12. The display device according to claim 11 , further comprising:
a signal line control circuit configured to provide a display signal to each of the signal lines; and
a gate line control circuit configured to provide a gate signal to each of the gate lines,
wherein
the signal line control circuit is disposed between the display portion and the first common line, and
the gate line control circuit is disposed between the display portion and the second common line.
13. The display device according to claim 10 , wherein the first common line and the second common line are formed of in a same layer as the signal lines.
14. The display device according to claim 10 , wherein the common electrode is closer to the liquid crystal layer than the first common line, the second common line, and the signal lines in a sectional view.
15. The display device according to claim 10 , wherein the first substrate comprises the entire portion of the first common line and the second common line in plan view.
16. The display device according to claim 10 , wherein the pixel electrode is under the common electrode.
17. The display device according to claim 10 , wherein the pixel electrode is above the common electrode.
18. The display device according to claim 10 ,
wherein the first common line and the second common line are disposed in an area where the pixels are not formed in plan view.