Dynamic timing calibration systems and methods
Provided herein are systems and methods for performing dynamic adaption and correction for internal delays in devices connected to a common time-multiplexed bus. The methods allow devices to operate reliably at a higher bus frequency by correcting for inherent and unknown delays within the components and in the system by measuring the actual delays using multiple readings with the bus. Intrinsic noise and jitter are used to increase the precision of the measurements, thereby essentially using these uncertainties as self-dithering for increased measurement resolution. During adaption, delays may be adjusted in multiple step sizes to speed adaption time.
1. A method comprising:
controlling a bus to facilitate communications between a plurality of devices, wherein a common line of the bus is used for time-multiplexed clock and data communication;
writing, by a first device, a first read timing value to the common line of the bus;
reading, by the first device, a second read timing value associated with the first read timing value written to the common line of the bus, wherein the writing and reading occur within a same data row of the bus; and
determining a read timing associated with the first device based, at least in part, on the first and second read timing values, wherein the read timing associated with the first device is configured to control a read delay of the first device to calibrate communications on the bus from the first device to the first device.
2. The method of claim 1 , further comprising:
writing, by a second device, a first write timing value to the bus;
reading, by the first device, a second write timing value associated with the first write timing value written to the bus, wherein the writing and reading of the first and second write timing values occur within a same data row of the bus; and
writing, by the first device, a response to the second device based, at least in part, on the second write timing value, wherein the response is configured to control a write delay of the second device to calibrate communications on the bus from the second device to the first device.
3. The method of claim 2 , further comprising:
writing, by the second device, a third read timing value to the bus;
reading, by a third device, a fourth read timing value associated with the third read timing value written to the bus, wherein the writing and reading of the third and fourth read timing values occur within a same data row of the bus; and
determining a read timing associated with the third device based, at least in part, on the third and fourth read timing values, wherein the read timing associated with the third device is configured to control a read delay of the third device to calibrate communications on the bus from the second device to the third device.
4. The method of claim 2 , further comprising:
writing, by the second device, a third read timing value to the bus;
reading, by the first device, a fourth read timing value associated with the third read timing value written to the bus, wherein the writing and reading of the third and fourth read timing values occur within a same data row of the bus; and
determining a read timing associated with the first device based, at least in part, on the third and fourth read timing values, wherein the read timing associated with the first device is configured to control a read delay of the first device to calibrate communications on the bus from the second device to the first device.
5. The method of claim 2 , further comprising:
writing, by the first or second device, a third write timing value to the bus;
reading, by the second device, a fourth write timing value associated with the third write timing value written to the bus, wherein the writing and reading occur within a same data row of the bus; and
determining a write timing associated with the second device based, at least in part, on the third and fourth write timing values, wherein the write timing associated with the second device is configured to control a write delay of the second device to calibrate communications on the bus from the first device to other devices coupled to the bus.
6. The method of claim 2 , further comprising:
providing a first settling mode to obtain an estimate of a correct write delay position using first delay steps during an initial correction;
providing a second settling mode to obtain a more precise write delay position for a final adjustment of the write delay, wherein the second settling mode employs second delay steps that are smaller than the first delay steps and settles slower than the first settling mode; and
switching between the first and second settling modes based, at least in part, on multiple read write timing values by:
switching to the first settling mode when there has not been a change in the second write timing value over a preselected number of reads; and
switching to the second settling mode when there have been one or more changes in second write timing value over the preselected number of reads.
7. The method of claim 2 , further comprising:
providing an adaptive mode with multiple adaption speeds;
determining whether the second write timing value being read is equal to a previous second write timing value and selectively increasing the adaption speed up to a certain upper limit; and
determining whether the second write timing value being read is different than the previous second write timing value and selectively decreasing the adaption speed to a certain lower limit.
8. The method of claim 1 , further comprising:
writing, by the first device, a first write timing value to the bus;
reading, by the first device, a second write timing value associated with the first write timing value written to the bus, wherein the writing and reading occur within a same data row of the bus; and
determining a write timing associated with the first device based, at least in part, on the first and second write timing values, wherein the write timing associated with the first device is configured to control a write delay of the first device to calibrate communications on the bus from the first device to the first device.
9. The method of claim 1 , further comprising:
adjusting an average of the second read timing value read from the bus to have a probability between zero and one; and
adjusting the read delay of the first device to avoid reading back a same value.
10. A system comprising:
a first device communicably coupled to a bus comprising a common line used for time-multiplexed clock and data communication, wherein the first device is configured to:
write a first read timing value to the common line of the bus;
read a second read timing value associated with the first read timing value from the common line of the bus, wherein the writing and reading occur within a same data row of the bus; and
determine a read timing associated with the first device based, at least in part, on the first and second read timing values, wherein the read timing associated with the first device is configured to control a read delay of the first device to calibrate communications on the bus from the first device to the first device.
11. The system of claim 10 , further comprising:
a second device communicably coupled to the bus, wherein the second device is configured to:
write a first write timing value to the bus;
read a response generated by the first device based, at least in part, on a second write timing value associated with the first write timing value written to the bus; and
control a write delay of the second device based, at least in part, on the response generated by the first device, to calibrate communications on the bus from the second device to the first device.
12. The system of claim 11 , further comprising a third device communicably coupled to the bus, wherein:
the second device is configured to write a third read timing value to the bus; and
the third device is configured to:
read a fourth read timing value associated with the third read timing value written to the bus, wherein the writing and reading of the third and fourth read timing values occur within a same data row of the bus; and
determine a read timing associated with the third device based, at least in part, on the third and fourth read timing values, wherein the read timing associated with the third device is configured to control a read delay of the third device to calibrate communications on the bus from the second device to the third device.
13. The system of claim 11 , wherein:
the second device is configured to write a third read timing value to the bus; and
the first device is configured to:
read a fourth read timing value associated with the third read timing value written to the bus, wherein the writing and reading of the third and fourth read timing values occur within a same data row of the bus; and
determine a read timing associated with the first device based, at least in part, on the third and fourth read timing values, wherein the read timing associated with the first device is configured to control a read delay of the first device to calibrate communications on the bus from the second device to the first device.
14. The system of claim 11 , wherein:
the second device is configured to:
write a third write timing value to the bus;
read a fourth write timing value associated with the third write timing value written to the bus, wherein the writing and reading occur within a same data row of the bus; and
determine a write timing associated with the second device based, at least in part, on the third and fourth write timing values, wherein the write timing associated with the second device is configured to control a write delay of the second device to calibrate communications on the bus from the first device to other devices coupled to the bus.
15. The system of claim 10 , wherein the first device is configured to:
estimate the read delay of the first device; and
adjust the read delay of the first device to cause a fluctuation of the second read timing value read by the first device.
16. A system comprising:
a first device communicably coupled to a bus comprising a common line used for time-multiplexed clock and data communication; and
a second device communicably coupled to the common line of the bus, wherein the second device is configured to:
write a first write timing value to the common line of the bus;
read a response generated by the first device based, at least in part, on a second write timing value associated with the first write timing value written to the common line of the bus; and
control a write delay of the second device based, at least in part, on the response generated by the first device, to calibrate communications on the bus from the second device to the first device.
17. The system of claim 16 , wherein the first device is configured to:
write a first read timing value to the bus;
read a second read timing value associated with the first read timing value, wherein the writing and reading occur within a same data row of the bus;
determine a read timing associated with the first device based, at least in part, on the first and second read timing values,
write a third write timing value to the bus;
read a fourth write timing value associated with the third read timing value, wherein the writing and reading the third and fourth writing values occur within a same data row of the bus; and
determine a write timing associated with the first device based, at least in part, on the first and second read timing values, wherein the read and write timings associated with the first device are configured to control read and write delays of the first device to calibrate communications on the bus from the first device to the first device.
18. The system of claim 16 , further comprising a third device communicably coupled to the bus, wherein:
the second device is configured to write a first read timing value to the bus; and
the third device is configured to:
read a second read timing value associated with the first read timing value written to the bus, wherein the writing and reading of the first and second read timing values occur within a same data row of the bus; and
determine a read timing associated with the third device based, at least in part, on the first and second read timing values, wherein the read timing associated with the third device is configured to control a read delay of the third device to calibrate communications on the bus from the second device to the third device.
19. The system of claim 16 , wherein:
the second device is configured to write a first read timing value to the bus; and
the first device is configured to:
read a third read timing value associated with the first read timing value written to the bus, wherein the writing and reading of the first and second read timing values occur within a same data row of the bus; and
determine a read timing associated with the first device based, at least in part, on the first and second read timing values, wherein the read timing associated with the first device is configured to control a read delay of the first device to calibrate communications on the bus from the second device to the first device.
20. The system of claim 16 , wherein:
the second device is configured to:
write a third write timing value to the bus;
read a fourth write timing value associated with the third write timing value written to the bus, wherein the writing and reading occur within a same data row of the bus; and
determine a write timing associated with the second device based, at least in part, on the third and fourth write timing values, wherein the write timing associated with the second device is configured to control a write delay of the second device to calibrate communications on the bus from the first device to other devices coupled to the bus.