IP Library Granted Patent US 11,386,003
Granted Patent B2
US 11,386,003 · App. 17/071,779 · Granted Jul 12, 2022

Forwarding code word address

Inventor: Joseph Thomas Pawlowski (Boise, ID)
Assignee: Micron Technology, Inc.
G06F12/0646G06F11/1076G06F2212/1032
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Quick Facts
Patent No.
US 11,386,003
App. No.
17/071,779
Granted
Jul 12, 2022
Kind
B2
Abstract

Methods, systems, and devices for forwarding a code word address are described. A memory subsystem, for example, may configure a code word including user data as a forwarded code word when the code word becomes unreliable or invalid close to or beyond an error recovery capability of the memory subsystem. The memory subsystem may configure the forwarded code word using a forwarded code word format and structure, which may include a bit field in the forwarded code word to indicate a code word condition and to store a quantity of duplicates of a forwarding address. When the memory subsystem receives a code word, the memory system may determine the code word as a forwarded code word such that the memory system may determine a forwarding address (e.g., from the code word). The memory subsystem may then use the forwarding address to access user data.

Claims (58)

1. A method, comprising:

receiving a code word associated with a memory medium, the code word comprising a set of bit fields;

determining a code word condition indicated in a bit field of the set of bit fields, the code word condition comprising a type of the code word indicating a forwarded code word;

determining a forwarding address of the code word based at least in part on the code word condition; and

communicating with the memory medium based at least in part on the forwarding address of the code word.

2. The method of claim 1 , wherein:

the forwarded code word comprises the bit field of the set of bit fields for at least one channel burst of a plurality of channel bursts of the code word indicating the code word condition and a quantity of duplicates of the forwarding address, and

determining the forwarding address of the code word is based at least in part on the quantity of duplicates of the forwarding address.

3. The method of claim 2 , wherein the code word condition indicates the forwarded code word is in a non-inverted state or an inverted state.

4. The method of claim 2 , further comprising:

determining a first quantity of address bits across the quantity of duplicates of the forwarding address indicating a first logic state, wherein the forwarding address of the code word is determined based at least in part on determining the first quantity of address bits of across the quantity of duplicates.

5. The method of claim 4 , further comprising:

determining that the first quantity of address bits is greater than a threshold quantity of duplicates of the forwarding address in at least a first portion of the code word; and

assigning the first logic state to an address bit of the forwarding address based at least in part on determining that the first quantity of address bits is greater than the threshold quantity of duplicates of the forwarding address, wherein the forwarding address of the code word is determined based at least in part on assigning the first logic state to the address bit of the forwarding address.

6. The method of claim 5 , wherein the threshold quantity of duplicates of the forwarding address is based at least in part on a usage pattern of the memory medium or a quantity of memory cells in the memory medium assigned the forwarding address.

7. The method of claim 5 , wherein the threshold quantity of duplicates of the forwarding address is less than a majority of the quantity of duplicates of the forwarding address.

8. The method of claim 1 , wherein receiving the code word comprises:

receiving a first portion of the code word comprising the bit field; and

receiving an additional portion of the code word based at least in part on the code word condition indicated in the bit field, wherein the forwarding address of the code word is determined based at least in part on receiving the additional portion of the code word.

9. The method of claim 8 , further comprising:

identifying a majority logic state of an address bit of the forwarding address across a quantity of duplicates of the forwarding address in the code word; and

assigning the majority logic state to the address bit of the forwarding address based at least in part on identifying the majority logic state of the address bit, wherein the forwarding address of the code word is determined based at least in part on assigning the majority logic state to the address bit of the forwarding address.

10. The method of claim 9 , wherein identifying the majority logic state of the address bit of the forwarding address further comprises:

determining a first quantity of address bits across the quantity of duplicates of the forwarding address in the code word indicating a first logic state;

determining a second quantity of address bits across the quantity of duplicates of the forwarding address in the code word indicating a second logic state; and

comparing the first quantity of address bits indicating the first logic state and the second quantity of address bits indicating the second logic state, wherein identifying the majority logic state is based at least in part on the comparison.

11. An apparatus, comprising:

a plurality of memory media, at least one memory medium of the plurality of memory media configured to generate a code word comprising a set of bit fields; and

a plurality of port managers, each port manager in electronic communication with different one or more memory media of the plurality of memory media, at least one port manager of the plurality of port managers is configured to:

receive, based at least in part on receiving an access command, the code word;

determine an indication of a forwarded code word in the code word based at least in part on a bit field of the set of bit fields;

determine a forwarding address of the code word based at least in part on the indication of the forwarded code word; and

communicate with the plurality of memory media based at least in part on the forwarding address of the code word.

12. The apparatus of claim 11 , wherein the at least one port manager of the plurality of port managers is further configured to:

determine a code word condition indicated in the bit field of the set of bit fields, wherein the indication of the forwarded code word is determined based at least in part on the code word condition.

13. The apparatus of claim 11 , wherein the at least one port manager of the plurality of port managers is further configured to:

receive a first portion of the code word comprising the bit field;

receive an additional portion of the code word, wherein the forwarding address of the code word is determined based at least in part on receiving the additional portion of the code word, and wherein the indication of the forwarded code word is concurrently determined with receiving the additional portion of the code word.

14. The apparatus of claim 13 , wherein the at least one port manager of the plurality of port managers is further configured to:

determine a first quantity of address bits across a quantity of duplicates of the forwarding address in the code word indicating a first logic state based at least in part on receiving the additional portion of the code word;

determine that the first quantity of address bits is greater than a threshold quantity of duplicates of the forwarding address in the code word; and

assign the first logic state to an address bit of the forwarding address based at least in part on determining that the first quantity of address bits is greater than the threshold quantity of duplicates of the forwarding address in the code word, wherein the forwarding address of the code word is determined based at least in part on assigning the first logic state to the address bit of the forwarding address.

15. A method, comprising:

receiving a code word associated with a memory medium, the code word comprising a set of bit fields;

determining a first quantity of erroneous bits in the code word relative to an error threshold using an error control operation based at least in part on receiving the code word;

configuring, based at least in part on the first quantity of erroneous bits in the code word relative to the error threshold, the code word to comprise at least one copy of a valid forwarding address associated with the code word; and

communicating with the memory medium based at least in part on configuring the code word.

16. The method of claim 15 , further comprising:

identifying the error threshold based at least in part on determining the first quantity of erroneous bits, the error threshold associated with a quantity of erroneous bits that the code word is preconfigured to recover; and

comparing the error threshold and the first quantity of erroneous bits, wherein the first quantity of erroneous bits relative to the error threshold is determined based at least in part on comparing the error threshold and the first quantity of erroneous bits.

17. The method of claim 15 , wherein determining the first quantity of erroneous bits in the code word relative to the error threshold further comprises:

determining that the first quantity of erroneous bits in the code word is equal to or greater than the error threshold.

18. The method of claim 15 , further comprising:

configuring the error threshold to a value based at least in part on a usage pattern of the memory medium or a type of memory cells in the memory medium.

19. The method of claim 15 , wherein identifying the first quantity of erroneous bits in the code word using the error control operation comprises:

performing an error correction code (ECC) operation on the code word.

20. The method of claim 15 , further comprising:

configuring a bit field of the set of bit fields for at least one channel burst of a plurality of channel bursts of the code word, the bit field indicating a code word condition corresponding to a forwarded code word, wherein configuring the code word is based at least in part on configuring the bit field.

Continuity (3)
Continuation 16249817 · Jan 16, 2019
Provisional Application 62671923 · May 15, 2018
Related Publication 20210103523A1 · Apr 8, 2021