IP Library Granted Patent US 11,509,267
Granted Patent B2
US 11,509,267 · App. 17/072,279 · Granted Nov 22, 2022

Amplifier

Inventor: Yuji Shiine (Tokyo, JP)
Assignee: ABLIC INC.
H03F1/26H03F3/005H03F2200/271H03F2200/333H03F2203/45551
View Patent ↗
Loading inventors, assignments & file history…
Monitor This Case
Get email alerts when status or documents change.
Order Certified Copies
Most orders are placed with the USPTO same day — all within 24 business hours.
Order via The Patent Place →
Pre-filled with this patent's details
Quick Facts
Patent No.
US 11,509,267
App. No.
17/072,279
Granted
Nov 22, 2022
Kind
B2
Abstract

An amplifier includes: a signal polarity inversion circuit which modulates an input signal and outputs a modulation signal; an amplifier circuit which is constituted from an operational transconductance amplifier (OTA) to amplify the modulation signal and output a current; and a sample-hold circuit having a sampling capacitor which is charged and discharged by selective sampling of the output current of the amplifier circuit and a holding capacitor to which the voltage of the sampling capacitor is transferred.

Claims (11)

1. An amplifier comprising:

a signal polarity inversion circuit configured to modulate an input signal and output a modulation signal;

an amplifier circuit constituted from an operational transconductance amplifier configured to amplify the modulation signal and output a current; and

a sample-hold circuit, having a sampling capacitor which is charged and discharged by selective sampling of the current supplied from the amplifier circuit and a holding capacitor to which a voltage of the sampling capacitor is transferred,

wherein:

the amplifier operates from a first period to an eighth period as one cycle,

the signal polarity inversion circuit does not invert the input signal in the first, a second, a fifth, and a sixth periods, and inverts the input signal in a third, a fourth, a seventh, and the eighth periods to output the modulation signal, and

the sample-hold circuit charges and discharges the sampling capacitor through sampling of the modulation signal in the second, the third, the fifth, and the sixth periods, and transfers a voltage of the sampling capacitor to the holding capacitor in the eighth period.

2. The amplifier according to claim 1 , wherein

the signal polarity inversion circuit modulates the input signal based on a first control signal and a second control signal, and

the sample-hold circuit selectively charges and discharges the current supplied from the amplifier circuit based on a third control signal and a fourth control signal to the sampling capacitor through sampling, and transfers a voltage of the sampling capacitor to the holding capacitor based on a fifth control signal.

Assignments (2)
CHANGE OF ADDRESS Recorded Jun 8, 2023
From: ABLIC INC.
To: ABLIC INC.
Reel/Frame 064021/0575 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Oct 16, 2020
From: SHIINE, YUJI
To: ABLIC INC.
Reel/Frame 054079/0543 →