Methods and apparatuses for use in tuning reactance in a circuit device
Methods and apparatuses for use in tuning reactance are described. Open loop and closed loop control for tuning of reactances are also described. Tunable inductors and/or tunable capacitors may be used in filters, resonant circuits, matching networks, and phase shifters. Ability to control inductance and/or capacitance in a circuit leads to flexibility in operation of the circuit, since the circuit may be tuned to operate under a range of different operating frequencies.
1. A tunable inductor, comprising:
a first RF terminal and a second RF terminal;
a fixed inductor having a first terminal connected directly to the first RF terminal, and a second terminal connected directly to the second RF terminal;
one or more digitally tunable capacitors, each comprising:
a circuital arrangement including a switch or a series arrangement of two or more switches, the circuital arrangement having a first terminal connected to the first RF terminal, and a second terminal connected to the second RF terminal;
one or more capacitive elements connected in series with the circuital arrangement;
wherein:
the circuital arrangement is configured so that enabling or disabling the switch or the two or more switches sets an effective inductance of the fixed inductor to a desired value by varying the capacitance between the first and the second RF terminals.
2. The tunable inductor of claim 1 , wherein at least one switching arrangement comprises a series connection of at least two switch elements.
3. The tunable inductor of claim 2 , wherein switch elements of the at least two switch elements receive the same control signal.
4. The tunable inductor of claim 3 , wherein at least one switch element of the at least two switch elements is selected from a group consisting of a field effect transistor, an accumulated charge control field effect transistor, a microelectromechanical system (MEMS) switch, a diode, and a gallium nitride (GaN) device.
5. The tunable inductor of claim 1 , wherein the inductive element and the at least two switch arrangements are integrated on a same chip or die.
6. The tunable inductor of claim 5 , wherein the chip is a silicon-on-insulator chip or a silicon-on-sapphire chip.
7. The tunable inductor of claim 1 , wherein the inductive element comprises a spiral inductor.
8. The tunable inductor of claim 7 , wherein at least one of the switching arrangements is located between turns of the spiral inductor.
9. An amplifier having a first stage and a second stage;
a tunable inductor, comprising:
a first RF terminal;
a plurality of second RF terminals;
a plurality of inductive elements connected each between the first RF terminal and a corresponding second RF terminal of the plurality of second RF terminals; and
a plurality of switch arrangements coupled serially with a corresponding plurality of inductive elements, wherein each switch arrangement of the plurality of switch arrangements is configured to receive a control signal, and wherein the control signal controls inductances applied between the first RF terminal and each of the second RF terminals of the plurality of second RF terminals by turning on or off switch arrangements in the plurality of switch arrangements;
a tunable interstage matching network including the tunable inductor of claim 1 coupled with a tunable capacitor;
wherein the tunable interstage matching network is configured to match the first stage to the second stage;
wherein each of the first and the second stages include transistors arranged in cascode configurations, and wherein each transistor is configured to receive a corresponding bias voltage through a gate resistor connected to the gate of the transistor.
10. An amplifier comprising:
a first stage and a second stage;
a tunable inductor, comprising:
a first RF terminal;
a plurality of second RF terminals;
a plurality of inductive elements connected each between the first RF terminal and a corresponding second RF terminal of the plurality of second RF terminals; and
a plurality of switch arrangements coupled serially with a corresponding plurality of inductive elements, wherein each switch arrangement of the plurality of switch arrangements is configured to receive a control signal, and wherein the control signal controls inductances applied between the first RF terminal and each of the second RF terminals of the plurality of second RF terminals by turning on or off switch arrangements in the plurality of switch arrangements;
a tunable interstage matching network including the tunable inductor of claim 1 coupled with a tunable capacitor;
wherein the tunable interstage matching network is configured to match the first stage to the second stage; and
wherein each of the first and the second stages include transistors arranged in cascode configurations, and wherein each transistor is configured to receive a corresponding bias voltage through a gate resistor connected to the gate of the transistor.
11. An amplifier having a first stage and a second stage;
a tunable inductor, comprising:
a first RF terminal;
a plurality of second RF terminals;
a plurality of inductive elements connected each between the first RF terminal and a corresponding second RF terminal of the plurality of second RF terminals; and
a plurality of switch arrangements coupled serially with a corresponding plurality of inductive elements, wherein each switch arrangement of the plurality of switch arrangements is configured to receive a control signal, and wherein the control signal controls inductances applied between the first RF terminal and each of the second RF terminals of the plurality of second RF terminals by turning on or off switch arrangements in the plurality of switch arrangements;
a tunable interstage matching network including the tunable inductor of claim 1 coupled with a tunable capacitor;
wherein
the tunable interstage matching network is configured to match the first stage to the second stage;
wherein the plurality of inductors and the plurality of switch arrangements are integrated on a same chip, and
each of the first and the second stages include transistors arranged in cascode configurations, and each transistor is configured to receive a corresponding bias voltage through a gate resistor connected to the gate of the transistor.
12. A tunable inductor comprising:
a first RF terminal and a second RF terminal;
a fixed inductor having a first terminal connected directly to the first RF terminal, and a second terminal connected directly to the second RF terminal;
one or more digitally tunable capacitors, each comprising:
an electronic circuit block including a switch or a series arrangement of two or more switches, the electronic circuit having a first terminal connected to the RF first terminal, and a second terminal connected to the second RF terminal;
one or more capacitive elements connected in series with the electronic circuit block;
wherein:
the electronic circuit block is configured to receive a control signal to enable or disable the switch or the two or more switches, thereby adjusting the capacitance between the first and the second RF terminals to set an effective inductance of the fixed inductor to a desired value.
13. The tunable inductor of claim 12 , wherein the switches comprise field-effect transistors (FETs).
14. The tunable inductor of claim 13 , wherein the one or more capacitive elements comprises a plurality of capacitors placed in a symmetric configuration on each side of the electronic circuit block.
15. The tunable inductor of claim 12 wherein capacitance values of the plurality of capacitors follows a binary weighting or non-base 2 exponential weighting scheme.
16. The tunable inductor of claim 12 implemented in a matching network.