Granted Patent B1

US 11,281,602 · App. 17/079,904 · Granted Mar 22, 2022

Inventors: Shyamkumar Iyer (Cedar Park, TX); Krishna Ramaswamy (Austin, TX); Gaurav Chawla (Austin, TX); Glen Sescila (Austin, TX); Andrew Butcher (Cedar Park, TX)

Assignee: Dell Products L.P.

G06F13/1668G06F15/17331

Abstract

Claims (57)

1. An information handling system, comprising:

a processor;

a first hardware device including a first engine to provide a first operation on data, and a second engine to provide a second operation on data; and

a second hardware device including a third engine to provide a third operation on data;

wherein the processor is configured to provide a first command to the first hardware device, the first command to direct the first engine to perform the first operation on first data to create second data based upon the performance of the first operation on the first data, to direct the second engine to perform the second operation on the second data to create third data based upon the performance of the second operation on the second data in response to a first completion signal, and provide a second command to the second hardware device, the second command to direct the third engine to perform the third operation on the third data to create fourth data based upon the performance of the third operation on the third data in response to a second completion signal; and

wherein the first hardware device is configured to provide the first completion signal to the second engine when the performance of the first operation on the first data is completed; and

wherein the first hardware device is configured to provide the second completion signal to the second hardware device when the performance of the second operation on the second data is completed.

2. The information handling system of claim 1 , wherein:

in creating the second data, the first engine operates to modify the first data; and

in creating the third data, the second engine operates to move the second data to an input/output device of the information handling system.

3. The information handling system of claim 2 , wherein the first operation includes one of a data compression/decompression operation, a data encryption/decryption operation, and a data deduplication operation.

4. The information handling system of claim 2 , wherein the input/output device includes one of a solid state drive (SSD) device, and a network interface device.

5. The information handling system of claim 4 , wherein, when the input/output device is an SSD device, the first command includes a non-volatile memory express command.

6. The information handling system of claim 4 , wherein, when the input/output device is a network interface device, the first command includes a remote direct memory access command.

7. The information handling system of claim 1 , wherein:

the command includes a source address and a destination address; and

the first hardware device is configured to retrieve the first data from a source memory location associated with the source address, and to store the third data to a destination memory location associated with the destination address.

8. The information handling system of claim 1 , wherein:

the first command includes a first source address and a first destination address;

the second command includes a second source address and a second destination address, wherein the first destination address and the second source address represent a same memory location;

the first hardware device is configured to retrieve the first data from a source memory location associated with the first source address, and to store the third data to an intermediate memory location associated with the first destination address; and

the second hardware device is configured to retrieve the third data from the intermediate memory location, and to store the fourth data to a destination memory location associated with the second destination address.

9. The information handling system of claim 1 , wherein the first hardware device is a smart data accelerator interface device.

10. A method, comprising:

receiving, by a first hardware device of an information handling system, a first command, the first hardware device including a first engine to provide a first operation on data, and a second engine to provide a second operation on data;

performing, by the first engine, the first operation on first data to create second data in response to receiving the first command;

providing, by the first engine, a first completion signal to the second engine when the performance of the first operation on the first data is completed;

performing, by the second engine, the second operation on the second data to create third data in response to the first completion signal; and

providing, by the first engine, a second completion signal when the performance of the second operation on the second data is completed;

receiving, by a second hardware device of the information handling system, a second command from the processor, the second hardware device including a third engine to provide a third operation on data;

receiving, by the second hardware device, the second completion signal; and

performing, by the third engine, the third operation on the third data to create third data in response to receiving the second command and the second completion signal.

11. The method of claim 10 , wherein:

in creating the second data, the method further comprises modifying, by the first engine, the first data; and

in creating the third data, the method further comprises moving, by the second engine, the second data to an input/output device of the information handling system.

12. The method of claim 11 , wherein the first operation includes one of a data compression/decompression operation, a data encryption/decryption operation, and a data deduplication operation.

13. The method of claim 11 , wherein the input/output device includes one of a solid state drive (SSD) device, and a network interface device.

14. The method of claim 13 , wherein, when the input/output device is a SSD device, the first command includes a non-volatile memory-express command.

15. The method of claim 13 , wherein, when the input/output device is a network interface device, the first command includes a remote direct memory access command.

16. The method of claim 10 , wherein:

the command includes a source address and a destination address; and

the method further comprises:

retrieving, by the first hardware device, the first data from a source memory location associated with the source address; and

storing, by the first hardware device, the third data to a destination memory location associated with the destination address.

17. The method of claim 10 , wherein:

the first command includes a first source address and a first destination address;

the second command includes a second source address and a second destination address, wherein the first destination address and the second source address represent a same memory location;

the method further comprises:

retrieving, by the first hardware device, the first data from a source memory location associated with the first source address;

storing, by the first hardware device, the third data to an intermediate memory location associated with the first destination address;

retrieving, by the second hardware device, the third data from the intermediate memory location; and

storing, by the second hardware device, the fourth data to a destination memory location associated with the second destination address.

18. An information handling system, comprising:

a processor; and

a Smart Data Accelerator Interface (SDXI) hardware device including a first engine to provide a first operation on data, and a second engine to provide a second operation on data;

wherein the processor is configured to provide an SDXI command to the first hardware device, the SDXI command to direct the first engine to perform the first operation on first data to create second data based upon the performance of the first operation on the first data, and to direct the second engine to perform the second operation on the second data to create third data based upon the performance of the second operation on the second data in response to a first completion signal; and

wherein the SDXI hardware device is configured to provide the first completion signal to the second engine when the performance of the first operation on the first data is completed.

Assignments (9)

Cited By (2)

US 12,306,778 US 12,619,383