Vertical packaging for ultrasound-on-a-chip and related methods
Vertical packaging configurations for ultrasound chips are described. Vertical packaging may involve use of integrated interconnects other than wires for wire bonding. Examples of such integrated interconnects include edge-contact vias, through silicon vias and conductive pillars. Edge-contact vias are vias defined in a trench formed in the ultrasound chip. Multiple vias may be provided for each trench, thus increasing the density of vias. Such vias enable electric access to the ultrasound transducers. Through silicon vias are formed through the silicon handle and provide access from the bottom surface of the ultrasound chip. Conductive pillars, including copper pillars, are disposed around the perimeter of an ultrasound chip and provide access to the ultrasound transducers from the top surface of the chip. Use of these types of packaging techniques can enable a substantial reduction in the dimensions of an ultrasound device.
1. A device comprising:
an ultrasound-on-a-chip comprising one or more ultrasound transducers, wherein the ultrasound-on-a-chip has a first surface that is mounted to a substrate and a second surface opposite the first surface; and
a first integrated interconnect that electrically connects the substrate to the one or more ultrasound transducers, wherein
the first integrated interconnect comprises a conductive pillar that extends, continuously, from the first surface to the second surface such that the first surface is electrically connected to the one or more ultrasound transducers through the second surface, and
the first integrated interconnect is spaced from the ultrasound-on-a-chip in a direction substantially parallel to the first surface.
2. The device of claim 1 , further comprising a metal portion electrically connecting the first integrated interconnect to the substrate.
3. The device of claim 1 , wherein the first integrated interconnect further comprises a conductive layer coupled to the conductive pillar and extending in the direction substantially parallel to the first surface.
4. The device of claim 1 , wherein the ultrasound-on-a-chip further comprises a conductive portion electrically connecting the first integrated interconnect with a bottom electrode of the one or more ultrasound transducers.
5. The device of claim 1 , wherein the conductive pillar is embedded within an insulative support that is coupled to the ultrasound-on-a-chip.
6. The device of claim 1 , wherein the one or more ultrasound transducers each comprise:
A bottom electrode electrically connected to the first integrated interconnect;
a membrane; and
one or more cavities formed between the bottom electrode and the membrane.
7. The device of claim 6 , wherein
the ultrasound-on-a-chip comprises a plurality of the ultrasound transducers, and
in each of the ultrasound transducers, a plurality of the cavities is formed between the bottom electrode and the membrane.
8. The device of claim 6 , wherein
the membrane is electrically connected to a second integrated interconnect, and
the first integrated interconnect is electrically isolated from the second integrated interconnect.
9. The device of claim 1 , wherein the conductive pillar has a height less than 1.5 mm.
10. The device of claim 1 , wherein the conductive pillar has a height less than 1 mm.
11. The device of claim 1 , wherein the conductive pillar has a height greater than a height of the ultrasound-on-a-chip.
12. The device of claim 1 , wherein
a second integrated interconnect electrically connects the substrate to the one or more ultrasound transducers, and
the first integrated interconnect is electrically isolated from the second integrated interconnect.
13. The device of claim 1 , wherein the second integrated interconnect comprises a conductive pillar that extends, continuously, from the first surface to the second surface such that the first surface is electrically connected to the one or more ultrasound transducers through the second surface.
14. The device of claim 1 , wherein the spacing between the first integrated interconnect and the ultrasound-on-a-chip is greater than or equal to 100 micrometers.
15. An ultrasound device, comprising:
an ultrasound-on-a-chip comprising one or more ultrasound transducers, wherein the ultrasound-on-a-chip has a first surface that is mounted to a substrate and a second surface opposite the first surface;
an interposer spaced from the ultrasound-on-a-chip in a first direction; and
a first integrated interconnect that electrically connects the interposer to the one or more ultrasound transducers, the first integrated interconnect comprising a conductive pillar spaced from the ultrasound-on-a-chip in a second direction perpendicular to the first direction, wherein
the conductive pillar extends, continuously, from the first surface to the second surface such that the first surface is electrically connected to the one or more ultrasound transducers through the second surface.
16. The ultrasound device of claim 15 , wherein a width of the ultrasound device along the second direction is less than 30 mm.
17. The ultrasound device of claim 15 , wherein the conductive pillar has a height along the first direction greater than a height of the ultrasound-on-a-chip along the first direction.
18. The device of claim 15 , wherein,
a second integrated interconnect electrically connects the substrate to the one or more ultrasound transducers, and
the first integrated interconnect is electrically isolated from the second integrated interconnect.
19. The device of claim 15 , wherein the second integrated interconnect comprises a conductive pillar that extends, continuously, from the first surface to the second surface such that the first surface is electrically connected to the one or more ultrasound transducers through the second surface.
20. The device of claim 15 , wherein the spacing between the first integrated interconnect and the ultrasound-on-a-chip is greater than or equal to 100 micrometers.