Memory device and operating method thereof

1. A memory device comprising:

an erase suspend count manager configured to store an erase suspend count representing a number of times an erase operation is suspended during the erase operation; and

a program parameter value determiner configured to generate a parameter value to be used for a program operation on the memory block, based on the erase suspend count; and

a program operation controller configured to perform the program operation on the memory block, using the determined parameter value.

2. The memory device of claim 1 ,

wherein the parameter value includes a program start voltage.

3. The memory device of claim 2 , wherein the program parameter value determiner determines the program start voltage to have a higher voltage level as the erase suspend count increases.

4. The memory device of claim 1 ,

wherein the parameter value includes a number of program loops.

5. The memory device of claim 4 , wherein the program parameter value determiner determines the number of program loops to be greater as the erase suspend count increases.

6. The memory device of claim 1 ,

wherein the parameter value includes a program step voltage.

7. The memory device of claim 6 , wherein the program parameter value determiner determines the program step voltage to have a higher voltage level as the erase suspend count increases.

8. The memory device of claim 1 , wherein the program operation is a soft program operation or a normal program operation.

9. The memory device of claim 1 , wherein the program parameter value determiner determines the parameter value corresponding to the erase suspend count according to a program parameter policy defining parameter values with respect to a number of times an erase operation is suspended.

10. The memory device of claim 9 , wherein the program parameter policy includes at least one of a first program parameter policy corresponding to a soft program operation and a second program parameter policy corresponding to a normal program operation.

11. The memory device of claim 1 ,

wherein the parameter value includes a pass voltage for applying to unselected word lines or a select voltage for applying to a select line during the program operation.

12. A method for operating a memory device, the method comprising:

performing an erase operation on a memory block;

suspending the erase operation on the memory block in response to an erase suspend command during the erase operation;

resuming the erase operation on the memory block in response to an erase resume command on the memory block while the erase operation on the memory block is suspended;

generating a counted number representing a number of times the erase operation is suspended until the erase operation on the memory block is completed; and

performing a program operation according to a parameter value determined based on the counted number.

13. The method of claim 12 ,

wherein the parameter value includes a program start voltage.

14. The method of claim 13 , wherein the program start voltage has a higher voltage level as the counted number increases.

15. The method of claim 12 ,

wherein the parameter value includes a number of program loops.

16. The method of claim 15 , wherein the number of program loops is greater as the counted number increases.

17. The method of claim 12 ,

wherein the parameter value includes a program step voltage.

18. The method of claim 17 , wherein the program step voltage has a higher voltage level as the counted number increases.

19. The method of claim 12 , wherein the program operation is a soft program operation or normal program operation.

20. The method of claim 12 , the parameter value includes a pass voltage for applying to unselected word lines or a select voltage for applying to a select line during the program operation.