IP Library Granted Patent US 11,705,811
Granted Patent B2
US 11,705,811 · App. 17/094,184 · Granted Jul 18, 2023

Buck-boost converter and hybrid control method

Inventors: Bo Yang (Allen, TX); Xiaoyu Xi (Dallas, TX); David Meng (Los Altos, CA)
Assignee: M3 Technology Inc.
H02M3/1582H02M1/08H02M1/0009
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Quick Facts
Patent No.
US 11,705,811
App. No.
17/094,184
Granted
Jul 18, 2023
Kind
B2
Abstract

An apparatus includes a buck converter portion of a buck-boost converter configured to operate under a constant on-time control scheme, wherein an on-time of a high-side switch of the buck converter portion is determined by a buck on-time timer, and a boost converter portion of the buck-boost converter configured to operate under a constant off-time control scheme, wherein an off-time of a low-side switch of the boost converter portion is determined by a boost off-time timer.

Claims (50)

1. An apparatus comprising:

a buck converter portion of a buck-boost converter configured to operate under a constant on-time control scheme, wherein an on-time of a high-side switch of the buck converter portion is determined by a buck on-time timer, wherein the buck on-time timer is configured to determine a turn-off edge of a gate drive signal applied to the high-side switch of the buck converter portion of the buck-boost converter, wherein a comparator of the buck on-time timer comprises a first input configured to receive a first ramp, and a second input configured to receive a first threshold voltage, and wherein the first ramp is generated by a first current source having a current level proportional to an input voltage of the buck-boost converter, and the first threshold voltage is proportional to an output voltage of the buck-boost converter; and

a boost converter portion of the buck-boost converter configured to operate under a constant off-time control scheme, wherein an off-time of a low-side switch of the boost converter portion is determined by a boost off-time timer.

2. The apparatus of claim 1 , wherein:

the buck converter portion comprises a first high-side switch and a first low-side switch connected in series between two input terminals of the buck-boost converter, wherein the first high-side switch is the high-side switch of the buck converter portion;

the boost converter portion comprises a second high-side switch and a second low-side switch connected in series between two output terminals of the buck-boost converter, wherein the second low-side switch is the low-side switch of the boost converter portion; and

an inductor is connected between a common node of the first high-side switch and the first low-side switch, and a common node of the second high-side switch and the second low-side switch.

3. The apparatus of claim 1 , wherein:

the boost off-time timer is configured to determine a turn-off edge of a gate drive signal applied to a high-side switch of the boost converter portion of the buck-boost converter, wherein a comparator of the boost off-time timer comprises a first input configured to receive a second ramp, a second input configured to receive a second threshold voltage, and wherein the second ramp is generated by a second current source having a current level proportional to the output voltage of the buck-boost converter, and the second threshold voltage is proportional to the input voltage of the buck-boost converter.

4. The apparatus of claim 3 , wherein:

a turn-off edge of a gate drive signal applied to a low-side switch of the buck converter portion of the buck-boost converter and a turn-off edge of a gate drive signal applied to the low-side switch of the boost converter portion of the buck-boost converter are determined by a comparator of the apparatus, and wherein the comparator of the apparatus has a first input configured to receive an output voltage of an error amplifier and a second input configured to receive a signal proportional to a current flowing through an inductor of the buck-boost converter.

5. The apparatus of claim 4 , wherein:

the error amplifier has a first input connected to a predetermined reference and a second input configured to detect the output voltage of the buck-boost converter.

6. The apparatus of claim 1 , wherein:

the buck-boost converter is configured to operate in a buck mode in response to an input voltage greater than an output voltage, and wherein in the buck mode, the low-side switch of the boost converter portion is always off and a high-side switch of the boost converter portion is always on.

7. The apparatus of claim 1 , wherein:

the buck-boost converter is configured to operate in a boost mode in response to an input voltage less than an output voltage, and wherein in the boost mode, a low-side switch of the buck converter portion is always off and the high-side switch of the buck converter portion is always on.

8. The apparatus of claim 1 , wherein:

the buck-boost converter is configured to operate in a buck-boost mode in response to an input voltage of the buck-boost converter approximately equal to an output voltage of the buck-boost converter, and wherein in the buck-boost mode, the buck-boost converter operates in a buck mode and a boost mode in a complementary manner.

9. The apparatus of claim 8 , wherein:

in the buck-boost mode, based on a relationship between a sensed current signal and an error amplifier output voltage signal, the buck-boost converter automatically transitions between the buck mode and the boost mode.

10. The apparatus of claim 9 , wherein:

the buck-boost converter is configured to operate in the buck mode when the sensed current signal is greater than the error amplifier output voltage signal; and

the buck-boost converter is configured to operate in the boost mode when the sensed current signal is less than the error amplifier output voltage signal.

11. A method comprising:

applying a constant on-time control scheme to a buck converter portion of a buck-boost converter, wherein under the constant on-time control scheme, an on-time of a high-side switch of the buck converter portion is determined by a buck on-time timer;

in the buck on-time timer, generating a first ramp using a first current source having a current level proportional to an input voltage of the buck-boost converter, generating a first threshold voltage proportional to an output voltage of the buck-boost converter, comparing the first threshold voltage with the first ramp using a first comparator, and terminating a gate drive signal of the high-side switch of the buck converter portion of the buck-boost converter based upon a comparing result generated by the first comparator;

applying a constant off-time control scheme to a boost converter portion of the buck-boost converter, wherein under the constant off-time control scheme, an off-time of a low-side switch of the boost converter portion is determined by a boost off-time timer; and

in the boost off-time timer, generating a second ramp using a second current source having a current level proportional to an output voltage of the buck-boost converter, generating a second threshold voltage proportional to the input voltage of the buck-boost converter, comparing the second threshold voltage with the second ramp using a second comparator, and terminating a gate drive signal of a high-side switch of the boost converter portion of the buck-boost converter based upon a comparing result generated by the second comparator.

12. The method of claim 11 , further comprising:

generating a current sense signal proportional to a current flowing through an inductor of the buck-boost converter;

comparing a detected output voltage of the buck-boost converter with a predetermined reference using an error voltage amplifier;

comparing the current sense signal with an output voltage of the error voltage amplifier using a comparator; and

terminating an on-time of a low-side switch of the buck converter portion of the buck-boost converter, and an on-time of a low-side switch of the boost converter portion of the buck-boost converter based upon a comparing result generated by the comparator.

13. The method of claim 12 , further comprising:

configuring the buck-boost converter to operate in a buck operating mode when an input voltage of the buck-boost converter is greater than an output voltage of the buck-boost converter, wherein in the buck operating mode, the boost off-time timer is disabled based on the comparing result generated by the comparator.

14. The method of claim 13 , further comprising:

configuring the buck-boost converter to operate in a boost operating mode when the input voltage of the buck-boost converter is less than the output voltage of the buck-boost converter, wherein in the boost operating mode, the buck on-time timer is disabled based on the comparing result generated by the comparator.

15. The method of claim 13 , further comprising:

configuring the buck-boost converter to operate in a buck-boost operating mode when the input voltage of the buck-boost converter is approximately equal to the output voltage of the buck-boost converter, wherein in the buck-boost operating mode, based on the comparing result generated by the comparator, the buck on-time timer and the boost off-time timer are enabled/disabled in a complementary manner.

16. A controller comprising:

a first timer for setting a turn-on time of a first high-side switch of a buck-boost converter, wherein the turn-on time of the first high-side switch is determined by an input voltage of the buck-boost converter and an output voltage of the buck-boost converter, wherein a comparator of the first timer comprises a first input configured to receive a first ramp and a second input configured to receive a first threshold voltage, and wherein the first ramp is generated by a first current source having a current level proportional to the input voltage of the buck-boost converter, and the first threshold voltage is proportional to the output voltage of the buck-boost converter;

a second timer for setting a turn-off time of a second low-side switch of the buck-boost converter, wherein the turn-off time of the second low-side switch is determined by the input voltage of the buck-boost converter and the output voltage of the buck-boost converter, wherein a comparator of the second timer comprises a first input configured to receive a second ramp and a second input configured to receive a second threshold voltage, and wherein the second ramp is generated by a second current source having a current level proportional to the output voltage of the buck-boost converter, and the second threshold voltage is proportional to the input voltage of the buck-boost converter; and

a current mode control device for setting a turn-on time of a first low-side switch and a turn-off time of a second high-side switch of the buck-boost converter.

17. The controller of claim 16 , wherein:

a turn-off edge of a gate drive signal applied to the first low-side switch of the buck-boost converter and a turn-off edge of a gate drive signal applied to the second high-side switch of the buck-boost converter are determined by an output of a comparator, and wherein the comparator has a first input configured to receive an output voltage of an error amplifier and a second input configured to receive a signal proportional to a current flowing through an inductor of the buck-boost converter.

18. The controller of claim 16 , wherein the buck-boost converter comprises:

the first high-side switch and the first low-side switch connected in series between two input terminals of the buck-boost converter;

the second high-side switch and the second low-side switch connected in series between two output terminals of the buck-boost converter; and

an inductor is connected between a common node of the first high-side switch and the first low-side switch, and a common node of the second high-side switch and the second low-side switch.

Assignments (1)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Nov 10, 2020
From: YANG, BO; XI, XIAOYU; MENG, DAVID
To: M3 TECHNOLOGY INC.
Reel/Frame 054324/0963 →
Continuity (1)
Related Publication 20220149737A1 · May 12, 2022