III-nitride multi-wavelength LED arrays

1. A light emitting diode (LED) array comprising:

a first mesa comprising a top surface, at least a first LED including a first p-type layer, a first n-type layer and a first color active region and a first tunnel junction on the first LED, the top surface of the first mesa comprising a second n-type layer on the first tunnel junction;

an adjacent mesa comprising a top surface, the first LED, a second LED including the second n-type layer, a second p-type layer, and a second color active region;

a second tunnel junction on the second LED of the adjacent mesa, and a third n-type layer on the second tunnel junction of the adjacent mesa;

a first trench separating the first mesa and the adjacent mesa;

first cathode metallization layer in the first trench, the first cathode metallization layer extending continuously from and in electrical contact with the first color active region and the second color active region of the adjacent mesa;

anode metallization contacts on the second n-type layer of the first mesa and on the top surface of the adjacent mesa; and

a thin film transistor (TFT) driver comprising a driving transistor having a first electrode connected to a V DD line and a second electrode, a capacitor being connected to the second electrode of the driving transistor and a first electrode being connected to a selecting transistor, and the selecting transistor having the first electrode and a second electrode, the second electrode of the selecting transistor being connected to a data line, wherein the selecting transistor is configured to be controlled by a select line, wherein the second electrode of the driving transistor is connected to one of the anode metallization contacts.

2. The LED array of claim 1 , wherein the top surface of the adjacent mesa comprises the third n-type layer.

3. The LED array of claim 1 , further comprising:

a third color active region on the n-type layer of the adjacent mesa and the adjacent mesa comprises a top surface including a third p-type layer;

a third mesa comprising the first LED, second LED, the second tunnel junction, and the third n-type layer on the second tunnel junction;

a second trench separating the adjacent mesa and the third mesa;

second cathode metallization layer in the second trench, the second cathode metallization layer extending continuously from and in electrical contact with the first color active region and the second color active region of the third mesa and the first cathode metallization layer in the first trench in electrical contact with the first color active region, the second color active region and the third color active region of the adjacent mesa; and

an anode metallization contact on the third n-type layer of the third mesa.

4. The LED array of claim 3 , wherein the third p-type layer of the adjacent mesa is a non-etched p-type layer.

5. The LED array of claim 3 , wherein the first color active region is a blue color active region and the second color active region is a green color active region.

6. The LED array of claim 3 , wherein the first color active region is a blue color active region, the second color active region is a green color active region and the third color active region is a red color active region.

7. The LED array of claim 1 , wherein the first p-type layer, the second p-type layer, the first n-type layer and the second n-type layer comprise a III-nitride material.

8. The LED array of claim 7 , wherein the III-nitride material comprises GaN.

9. The LED array of claim 3 , wherein the first p-type layer, the second p-type layer, the third p-type layer, the first n-type layer, the first n-type layer, the second n-type layer and the third n-type layer comprise a III-nitride material.

10. The LED array of claim 9 , wherein the III-nitride material comprises GaN.

11. The LED array of claim 1 , wherein the first mesa has a sidewall and the adjacent mesa has a sidewall and the first mesa sidewall and the adjacent mesa sidewall form an angle with a top surface of a substrate upon which the mesas are formed in a range of from 60 to less than 90 degrees.

12. An electronic system comprising:

the LED array of claim 1 ; and

driver circuitry configured to provide independent voltages to one or more of anode contacts.

13. The electronic system of claim 12 , wherein the electronic system is selected from the group consisting of a LED-based luminaire, a light emitting strip, a light emitting sheet, an optical display, and a microLED display.

14. A method of manufacturing an LED array, the method comprising:

forming a first mesa comprising a top surface, at least a first LED including a first p-type layer, a first n-type layer and a first color active region and a first tunnel junction on the first LED, the top surface comprising a second n-type layer on the first tunnel junction;

forming an adjacent mesa comprising the first LED, a second LED including the second n-type layer, a second p-type layer and a second color active region;

forming a second tunnel junction on the second LED of the adjacent mesa, and a third n-type layer on the second tunnel junction of the adjacent mesa p-type layer;

forming a first trench separating the first mesa and the adjacent mesa;

forming a first cathode metallization layer in the first trench, the first cathode metallization layer extending continuously from and in electrical contact with the first color active region and the second color active region of the adjacent mesa; and

forming anode metallization contacts on the second n-type layer of the first mesa and on the third n-type layer of the adjacent mesa; and

forming a thin film transistor (TFT) driver comprising a driving transistor having a first electrode connected to a V DD line and a second electrode, a capacitor being connected to the second electrode of the driving transistor and a first electrode being connected to a selecting transistor, and the selecting transistor having the first electrode and a second electrode, the second electrode of the selecting transistor being connected to a data line, wherein the selecting transistor is configured to be controlled by a select line, wherein the second electrode of the driving transistor is connected to one of the anode metallization contacts.

15. The method of claim 14 , further comprising forming a top surface of the adjacent mesa comprising the third n-type.

16. The method of claim 14 , further comprising:

forming a third color active region on the n-type layer of the adjacent mesa and the adjacent mesa comprises a top surface including a third p-type layer;

forming a third mesa comprising a top surface, the first LED, the second LED, the second tunnel junction, and including the third n-type layer on the second tunnel junction;

and the third color active region, the top surface of the third mesa comprising the third n-type layer;

forming a second trench separating the adjacent mesa and the third mesa;

forming a second cathode metallization layer in the second trench, the second cathode metallization layer extending continuously from and in electrical contact with the first color active region and the second color active region of the third mesa and the first cathode metallization layer in the first trench in electrical contact with the first color active region, the second color active region and the third color active region of the second adjacent mesa, and the n-type metallization in the first trench in electrical contact with the third color active region; and

forming an anode metallization contact on the third n-type layer of the third mesa.

17. The method of claim 16 , wherein each of the first LED, the second LED and the third LED comprise epitaxially deposited III-nitride material.

18. The method of claim 17 , wherein the first LED, the second LED and the third LED are formed on a substrate, and wherein the first trench and second trench are formed by etching trenches to form the first mesa, the adjacent mesa and the third mesa.