Package structure and manufacturing method thereof
A package structure includes a first chip, a first redistribution layer, a second chip, a second redistribution layer, a third redistribution layer, a carrier, and a first molding compound layer. The first redistribution layer is arranged on a surface of the first chip. The second redistribution layer is arranged on a surface of the second chip. The third redistribution layer interconnects the first redistribution layer and the second redistribution layer. The carrier is arranged on a side of the third redistribution layer away from the first redistribution layer and the second redistribution layer. The first molding compound layer covers the first chip, the first redistribution layer, the second chip, and the second redistribution layer. A manufacturing method is also disclosed.
1. A manufacturing method of a package structure comprising:
providing a first chip and a second chip, forming a first redistribution layer on the first chip, and forming a second redistribution layer on the second chip, the first redistribution layer being electrically connected to the first chip, the second redistribution layer being electrically connected to the second chip;
forming a first molding compound layer which covers the first chip, the second chip, the first redistribution layer, and the second redistribution layer, a surface of the first redistribution layer away from the first chip and a surface of the second redistribution layer away from the second chip being exposed from the first molding compound layer;
providing a carrier and forming a third redistribution layer on the carrier;
bonding the third redistribution layer to the first redistribution layer and the second redistribution layer, the third redistribution layer electrically connecting the first redistribution layer and the second redistribution layer; and
bonding the structure obtained in the step of bonding the third redistribution layer to the first redistribution layer and the second redistribution layer to a base board, wherein the first redistribution layer and the second redistribution layer are both electrically connected to the base board;
wherein a plurality of first connection terminals are arranged on the first redistribution layer and the second redistribution layer, a plurality of connecting portions are arranged on the base board and are electrically connected to the plurality of first connection terminals; and
wherein the package structure further comprises a second molding compound layer and a plurality of conductive structures, the second molding compound layer covers the first molding compound layer, the first redistribution layer, and the second redistribution layer, the second molding compound layer defines a plurality of through mold vias exposing the plurality of first connection terminals, the plurality of conductive structures infill the plurality of through mold vias and electrically connect the plurality of first connection terminals and the plurality of connecting portions.
2. The manufacturing method of claim 1 , wherein forming the first molding compound layer comprises:
attaching the first redistribution layer and the second redistribution layer to a surface of a temporary carrier, the surface of first redistribution layer away from the first chip being flush with the surface of the second redistribution layer away from the second chip;
forming the first molding compound layer covering the first chip, the first redistribution layer, the second chip, and the second redistribution layer;
removing the temporary carrier, so that the surface of first redistribution layer away from the first chip and the surface of the second redistribution layer away from the second chip are exposed from the first molding compound layer.
3. The manufacturing method of claim 1 , wherein each of the plurality of first connection terminals is electrically connected to a corresponding one of the plurality of connecting portions via a wire.
4. The manufacturing method of claim 1 , wherein a plurality of second connection terminals are arranged on the first redistribution layer and the second redistribution layer, a plurality of third connection terminals are arranged on a surface of the third redistribution layer and are electrically connected to the plurality of second connection terminals.