IP Library Granted Patent US 11,429,290
Granted Patent B2
US 11,429,290 · App. 17/097,590 · Granted Aug 30, 2022

Methods and systems for providing a lockless access to a shared memory region in a publish and subscribe system

Inventor: Randall Nortman (Pittsburgh, PA)
Assignee: Argo AI, LLC
G06F3/0622G06F3/0655G06F3/0679
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Quick Facts
Patent No.
US 11,429,290
App. No.
17/097,590
Granted
Aug 30, 2022
Kind
B2
Abstract

Systems and methods for providing lockless access to a buffer ring are disclosed. The systems include a shared memory comprising the buffer ring. The buffer ring includes a plurality of sequentially arranged fixed size buffers configured to store messages, and a global header comprising a counter and a lock. The systems further include a publisher configured to write a plurality of messages to the plurality of fixed sized buffers in the buffer ring, and a subscriber configured to read one or more of the plurality of messages written by the publisher. The counter provides information relating to a fixed size buffer in the buffer ring to which the publisher will next write a message.

Claims (61)

1. A system for providing lockless access to a buffer ring, the system comprising:

a shared memory comprising:

the buffer ring, the buffer ring comprising:

a plurality of sequentially arranged fixed size buffers configured to store messages, and

a global header comprising a counter and a lock, and

a synchronization data storage region corresponding to each of the plurality of fixed sized size buffers, wherein the synchronization data storage region corresponding to a fixed size buffer comprises a buffer counter that indicates accuracy of a message read from that fixed size buffer by a subscriber;

a publisher configured to write a plurality of messages to the plurality of fixed sized buffers in the buffer ring; and

the subscriber configured to read one or more of the plurality of messages written by the publisher,

wherein the counter provides information relating to a fixed size buffer in the buffer ring to which the publisher will next write a message.

2. The system of claim 1 , wherein a negative value of the counter is indicative of a state of the system in which the buffer ring does not include any messages.

3. The system of claim 2 , wherein the publisher is further configured to assign a value of 0 to the counter upon completion of a first write to the ring buffer.

4. The system of claim 3 , wherein the publisher is further configured to increase the value of the counter after each subsequent operation such that an index of the fixed size buffer in the buffer ring to which the publisher most recently wrote a message is determined by dividing a value of the counter by 2.

5. The system of claim 1 , wherein:

the lock is acquired by the publisher before executing a write to one of the plurality of fixed size buffers; and

the lock is released by the publisher after execution of the write.

6. The system of claim 5 , further comprising:

a plurality of publishers, each of the plurality of publishers configured to write one or more messages to the plurality of fixed sized buffers in the buffer ring; and

wherein the lock can be acquired by a single one of the plurality of publishers at any given time.

7. The system of claim 1 , wherein each of the plurality of messages has a finite size.

8. The system of claim 1 , wherein the plurality of fixed size buffers do not share cache lines with each other in the shared memory.

9. The system of claim 1 , wherein each of the plurality of fixed size buffers comprises a buffer header configured to store at least one of the following: a buffer index number, synchronization information, or buffer state information.

10. The system of claim 9 , wherein the buffer header occupies a unique cache line in the shared memory.

11. The system of claim 10 , wherein each of the plurality of fixed size buffers further comprises a data region that starts in a cache line of the shared memory immediately following the unique cache line of a corresponding buffer header.

12. The system of claim 1 , wherein a memory address of the synchronization data storage region is included in a buffer header of that fixed sized buffer.

13. The system of claim 1 , wherein:

an initial value of the buffer counter is set to 0; and

the publisher is configured to, for execution of a write to that fixed size buffer, increment a value of the buffer counter before the execution of the write and after the execution of the write.

14. The system of claim 13 , wherein the subscriber is configured to:

compare a first value of the buffer counter before execution of a read from that fixed size buffer with a second value of the buffer counter after execution of the read from that fixed size buffer; and

discard a message read from that fixed size buffer if the first value does not match the second value.

15. The system of claim 1 , wherein a value of the buffer counter is odd during execution of a write to that fixed sized buffer by the publisher.

16. The system of claim 15 , wherein the subscriber is configured to wait for a notification of completion of the write being executed when the value of the buffer counter is odd before executing a read on that fixed size buffer.

17. The system of claim 1 , wherein the data synchronization region further comprises a futex system call that is configured to send a new message notification to the subscriber when a value of the buffer counter increments by 2 and is even.

18. The system of claim 1 , wherein the data synchronization region further comprises a futex system call that is configured to send a wait notification to the subscriber when a value of the buffer counter is either odd or has not incremented.

19. The system of claim 1 , wherein the data synchronization region further comprises a futex system call that is configured to send a wait notification to a plurality of publishers in the system when a value of the buffer counter is odd.

20. The system of claim 1 , wherein a size of the plurality of fixed size zones is determined based on at least one of the following: maximum message size, maximum number of fixed size zones, or alignment.

21. A method for enabling message transfer between a publisher and a subscriber, the method comprising, by a processor:

generating, in a shared memory:

a data structure comprising a buffer ring, the buffer ring comprising:

a plurality of sequentially arranged fixed size buffers configured to store messages, and

a global header comprising a seqlock, wherein the seqlock includes a seqlock counter that provides information relating to a fixed size buffer in the buffer ring to which the publisher will next write a message; and

a synchronization data storage region corresponding to each of the plurality of fixed sized size buffers, the synchronization data storage region comprising a buffer counter that indicates accuracy of a message read from that fixed size buffer by the subscriber.

22. The method of claim 21 , wherein a negative value of the seqlock counter is indicative of a state of the system in which the buffer ring does not include any messages.

23. The method of claim 22 , further comprising, by the publisher, assigning a value of 0 to the counter upon completion of a first write to the ring buffer.

24. The method of claim 23 , further comprising, by the publisher, increasing the value of the counter after each subsequent operation such that an index of the fixed size buffer in the buffer ring to which the publisher most recently wrote a message is determined by dividing a value of the counter by 2.

25. The method of claim 21 , wherein:

the lock is acquired by the publisher before executing a write to one of the plurality of fixed size buffers; and

the lock is released by the publisher after execution of the write.

26. The method of claim 21 , wherein the plurality of fixed size buffers do not share cache lines with each other in the shared memory.

27. The method of claim 21 , wherein each of the plurality of buffers comprises a buffer header configured to store at least one of the following: a buffer index number, synchronization information, or buffer state information.

28. The method of claim 27 , wherein the buffer header occupies a unique cache line in the shared memory.

29. The method of claim 28 , wherein each of the plurality of buffers further comprises a data region that starts in a cache line of the shared memory immediately following the unique cache line of a corresponding buffer header.

30. The method of claim 21 , wherein a memory address of the synchronization data storage region is included in a buffer header of that fixed sized buffer.

31. The method of claim 21 , wherein:

an initial value of the buffer counter is set to 0; and

the publisher is configured to, for execution of a write to that fixed size buffer, increment a value of the buffer counter before the execution of the write and after the execution of the write.

32. The method of claim 31 , further comprising, by the subscriber:

comparing a first value of the buffer counter before execution of a read from that fixed size buffer with a second value of the buffer counter after execution of the read from that fixed size buffer; and

discarding a message read from that fixed size buffer if the first value does not match the second value.

33. The method of claim 21 , wherein a value of the buffer counter is odd during execution of a write to that fixed sized buffer by the publisher.

34. The method of claim 33 , further comprising, by the subscriber, waiting for a notification of completion of the write being executed when the value of the buffer counter is odd before executing a read on that fixed size buffer.

Assignments (2)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Mar 9, 2023
From: ARGO AI, LLC
To: FORD GLOBAL TECHNOLOGIES, LLC
Reel/Frame 063025/0346 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Nov 13, 2020
From: NORTMAN, RANDALL
To: ARGO AI, LLC
Reel/Frame 054362/0533 →
Continuity (1)
Related Publication 20220155975A1 · May 19, 2022