IP Library Granted Patent US 11,463,009
Granted Patent B2
US 11,463,009 · App. 17/103,250 · Granted Oct 4, 2022

Flying capacitor charging method and apparatus

Inventor: Yiming Jiang (Shenzhen, CN)
Assignee: HUAWEI DIGITAL POWER TECHNOLOGIES CO., LTD.
H02M3/1584H02J7/345H02M1/0095H02M3/07
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Quick Facts
Patent No.
US 11,463,009
App. No.
17/103,250
Granted
Oct 4, 2022
Kind
B2
Abstract

This application provides a flying capacitor charging method and apparatus, applied to a multi-level topology circuit, to provide a flying capacitor charging solution with a small occupation area and strong applicability. The circuit is connected to an input power source by using a first switch, and is connected to an output power source by using a second switch. A first end of a first capacitor in flying capacitors in the circuit is connected to a first electrode of a first semiconductor switch transistor, a second end of the first capacitor in the flying capacitors in the circuit is connected to a second electrode of a second semiconductor switch transistor, and a second electrode of the first semiconductor switch transistor is connected to a first electrode of the second semiconductor switch transistor by using a second capacitor. The second capacitor is an input capacitor, an output capacitor, or another flying capacitor.

Claims (74)

1. A flying capacitor charging method applied to a flying capacitor multi-level topology circuit, comprising:

closing a first semiconductor switch transistor and a second semiconductor switch transistor, to connect a first capacitor to a second capacitor in parallel, wherein the multi-level topology circuit is connected to an input power source by using a first switch, wherein the multi-level topology circuit is connected to an output power source by using a second switch, wherein the multi-level topology circuit comprises one or more flying capacitors, wherein a first end of the first capacitor in the one or more flying capacitors is connected to a first electrode of the first semiconductor switch transistor, wherein a second end of the first capacitor is connected to a second electrode of the second semiconductor switch transistor, wherein the second capacitor is on an electrical path between a second electrode of the first semiconductor switch transistor and a first electrode of the second semiconductor switch transistor, and wherein the first capacitor is any one of the one or more flying capacitors, and the second capacitor is an input capacitor, an output capacitor, or a flying capacitor other than the first capacitor in the one or more flying capacitors;

charging the first capacitor and the second capacitor to a first voltage value;

opening the first semiconductor switch transistor and the second semiconductor switch transistor; and

charging the second capacitor to a second voltage value.

2. The method according to claim 1 , further comprising:

closing the first switch after the one or more flying capacitors and the input capacitor are all charged;

adjusting the multi-level topology circuit to a normal working state, and controlling the output capacitor to be charged to a third voltage value, wherein the third voltage value is a voltage value of the output power source; and

closing the second switch.

3. The method according to claim 1 , further comprising:

closing the second switch after the one or more flying capacitors and the output capacitor are all charged;

adjusting the multi-level topology circuit to a normal working state, and controlling the input capacitor to be charged to a fourth voltage value, wherein the fourth voltage value is a voltage value of the input power source; and

closing the first switch.

4. The method according to claim 1 , further comprising:

closing the first switch after a first part of flying capacitors in the one or more flying capacitors and the input capacitor are all charged, wherein the multi-level topology circuit is a buck-boost conversion circuit, and wherein the first part of flying capacitors includes all flying capacitors in a buck circuit or a boost circuit in which the first capacitor is located;

adjusting the multi-level topology circuit to a normal working state, controlling the output capacitor to be charged to a fifth voltage value, wherein the fifth voltage value is a voltage value of the output power source, and controlling a second part of flying capacitors in the one or more flying capacitors to be charged to respective ideal voltage values; and

closing the second switch.

5. The method according to claim 1 , further comprising:

closing the second switch after a first part of flying capacitors in the one or more flying capacitors and the output capacitor are all charged, wherein the multi-level topology circuit is a buck-boost conversion circuit, and wherein the first part of flying capacitors includes all flying capacitors in a buck circuit or a boost circuit in which the first capacitor is located;

adjusting the multi-level topology circuit to a normal working state, controlling the input capacitor to be charged to a sixth voltage value, wherein the sixth voltage value is a voltage value of the input power source, and controlling a second part of flying capacitors in the one or more flying capacitors to be charged respectively to respective ideal voltage values; and

closing the first switch.

6. The method according to claim 1 , wherein the first voltage value is U*½ N , wherein the second voltage value is U*½ N-1 , wherein U is a voltage value of the input power source or a voltage value of the output power source, and wherein N is a positive integer.

7. The method according to claim 1 , wherein the charging the first capacitor to the first voltage value comprises:

charging the first capacitor to the first voltage value by using an external direct current power source; or

charging the first capacitor to the first voltage value by connecting a soft-start resistor to the input power source or the output power source.

8. A flying capacitor charging apparatus, comprising

a multi-level topology circuit, wherein the multi-level topology circuit is connected to an input power source by using a first switch, wherein the multi-level topology circuit is connected to an output power source by using a second switch, wherein the multi-level topology circuit comprises one or more flying capacitors, wherein a first end of a first capacitor in the one or more flying capacitors is connected to a first electrode of a first semiconductor switch transistor, wherein a second end of the first capacitor is connected to a second electrode of a second semiconductor switch transistor, wherein a second capacitor is on an electrical path between a second electrode of the first semiconductor switch transistor and a first electrode of the second semiconductor switch transistor, wherein the first capacitor is any one of the one or more flying capacitors, and wherein the second capacitor is an input capacitor, an output capacitor, or a flying capacitor other than the first capacitor in the one or more flying capacitors; and

a controller configured to:

close the first semiconductor switch transistor and the second semiconductor switch transistor, to connect the first capacitor to the second capacitor in parallel;

charge the first capacitor and the second capacitor to a first voltage value;

open the first semiconductor switch transistor and the second semiconductor switch transistor; and

charge the second capacitor to a second voltage value.

9. The apparatus according to claim 8 , wherein the controller is further configured to:

close the first switch after the one or more flying capacitors and the input capacitor are all charged;

adjust the multi-level topology circuit to a normal working state, and control the output capacitor to be charged to a third voltage value, wherein the third voltage value is a voltage value of the output power source; and

close the second switch.

10. The apparatus according to claim 8 , wherein the controller is further configured to:

close the second switch after the one or more flying capacitors and the output capacitor are all charged;

adjust the multi-level topology circuit to a normal working state, and control the input capacitor to be charged to a fourth voltage value, wherein the fourth voltage value is a voltage value of the input power source; and

close the first switch.

11. The apparatus according to claim 8 , wherein the controller is further configured to:

close the first switch after a first part of flying capacitors in the one or more flying capacitors and the input capacitor are all charged, wherein the multi-level topology circuit is a buck-boost conversion circuit, and wherein the first part of flying capacitors includes all flying capacitors in a buck circuit or a boost circuit in which the first capacitor is located;

adjust the multi-level topology circuit to a normal working state, control the output capacitor to be charged to a fifth voltage value, wherein the fifth voltage value is a voltage value of the output power source, and control a second part of flying capacitors in the one or more flying capacitors to be charged respectively to respective ideal voltage values;

and close the second switch.

12. The apparatus according to claim 8 , wherein the controller is further configured to:

close the second switch after a first part of flying capacitors in the one or more flying capacitors and the output capacitor are all charged, wherein the multi-level topology circuit is a buck-boost conversion circuit, and wherein the first part of flying capacitors includes all flying capacitors in a buck circuit or a boost circuit in which the first capacitor is located;

adjust the multi-level topology circuit to a normal working state, control the input capacitor to be charged to a sixth voltage value, wherein the sixth voltage value is a voltage value of the input power source, and control a second part of flying capacitors in the one or more flying capacitors to be charged respectively to respective ideal voltage values; and

close the first switch.

13. The apparatus according to claim 8 , wherein the first specified voltage value is U*½ N , wherein the second specified voltage value is U*½ N-1 , wherein U is a voltage value of the input power source or a voltage value of the output power source, and wherein N is a positive integer.

14. The apparatus according to claim 8 , wherein when charging the first capacitor to the first voltage value, the controller is configured to:

charge the first capacitor to the first voltage value by using an external direct current power source; or

charge the first capacitor to the first voltage value by connecting a soft-start resistor to the input power source or the output power source.

15. A non-transitory computer-readable medium having instructions stored therein, which when executed by a processor, cause the processor to perform operations, the operations comprising:

closing a first semiconductor switch transistor and a second semiconductor switch transistor, to connect a first capacitor to a second capacitor in parallel, wherein a multi-level topology circuit is connected to an input power source by using a first switch, wherein the multi-level topology circuit is connected to an output power source by using a second switch, wherein the multi-level topology circuit comprises one or more flying capacitors, wherein a first end of the first capacitor in the one or more flying capacitors is connected to a first electrode of the first semiconductor switch transistor, wherein a second end of the first capacitor is connected to a second electrode of the second semiconductor switch transistor, wherein the second capacitor is on an electrical path between a second electrode of the first semiconductor switch transistor and a first electrode of the second semiconductor switch transistor, and wherein the first capacitor is any one of the one or more flying capacitors, and the second capacitor is an input capacitor, an output capacitor, or a flying capacitor other than the first capacitor in the one or more flying capacitors;

charging the first capacitor and the second capacitor to a first voltage value;

opening the first semiconductor switch transistor and the second semiconductor switch transistor; and

charging the second capacitor to a second voltage value.

16. The medium according to claim 15 , wherein the operations further comprise:

closing the first switch after the one or more flying capacitors and the input capacitor are all charged;

adjusting the multi-level topology circuit to a normal working state, and controlling the output capacitor to be charged to a third voltage value, wherein the third voltage value is a voltage value of the output power source; and

closing the second switch.

17. The medium according to claim 15 , wherein the operations further comprise:

closing the second switch after the one or more flying capacitors and the output capacitor are all charged;

adjusting the multi-level topology circuit to a normal working state, and controlling the input capacitor to be charged to a fourth voltage value, wherein the fourth voltage value is a voltage value of the input power source; and

closing the first switch.

18. The medium according to claim 15 , wherein the operations further comprise:

closing the first switch after a first part of flying capacitors in the one or more flying capacitors and the input capacitor are all charged, wherein the multi-level topology circuit is a buck-boost conversion circuit, and wherein the first part of flying capacitors includes all flying capacitors in a buck circuit or a boost circuit in which the first capacitor is located;

adjusting the multi-level topology circuit to a normal working state, controlling the output capacitor to be charged to a fifth voltage value, wherein the fifth voltage value is a voltage value of the output power source, and controlling a second part of flying capacitors in the one or more flying capacitors to be charged to respective ideal voltage values; and

closing the second switch.

19. The medium according to claim 15 , wherein the operations further comprise:

closing the second switch after a first part of flying capacitors in the one or more flying capacitors and the output capacitor are all charged, wherein the multi-level topology circuit is a buck-boost conversion circuit, and wherein the first part of flying capacitors includes all flying capacitors in a buck circuit or a boost circuit in which the first capacitor is located;

adjusting the multi-level topology circuit to a normal working state, controlling the input capacitor to be charged to a sixth voltage value, wherein the sixth voltage value is a voltage value of the input power source, and controlling a second part of flying capacitors in the one or more flying capacitors to be charged respectively to respective ideal voltage values; and

closing the first switch.

20. The medium according to claim 15 , wherein the first specified voltage value is U*½ N , wherein the second specified voltage value is U*½ N-1 , wherein U is a voltage value of the input power source or a voltage value of the output power source, and wherein N is a positive integer.

Assignments (2)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Dec 31, 2021
From: HUAWEI TECHNOLOGIES CO., LTD.
To: HUAWEI DIGITAL POWER TECHNOLOGIES CO., LTD.
Reel/Frame 058601/0734 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Nov 24, 2020
From: JIANG, YIMING
To: HUAWEI TECHNOLOGIES CO., LTD.
Reel/Frame 054460/0761 →
Priority Claims (1)
CN 201811244229.4 · Oct 24, 2018 · national
Continuity (2)
Continuation PCTCN2019106278 · Sep 17, 2019
Related Publication 20210083585A1 · Mar 18, 2021