IP Library Granted Patent US 11,516,117
Granted Patent B2
US 11,516,117 · App. 17/104,010 · Granted Nov 29, 2022

Single queue link aggregation

Inventors: Steve Rochon (Brossard, CA); Yanick Viens (St-Jean-sur-Richelieu, CA)
Assignee: Accedian Networks Inc.
H04L45/245H04L45/745H04L47/32H04L49/90Y02D30/50
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Quick Facts
Patent No.
US 11,516,117
App. No.
17/104,010
Granted
Nov 29, 2022
Kind
B2
Abstract

A method for transmitting a packet on a logical port comprising two or more physical ports comprises receiving a packet of a class of service; storing the packet in a memory; maintaining a lookup table relating a plurality of identifiers to at least one physical port; storing a pointer to the stored packet in the memory in a single pointer list for the class of service along with a selected one of the identifiers; and copying the stored packet to one or more physical ports corresponding to the selected identifier for transmission on at least one of the physical ports. In one implementation, a plurality of the physical ports are grouped into a logical port, and the received packet is processed to determine its logical port and its class of service.

Claims (19)

1. A method for transmitting a packet of a class of service from a device comprising a plurality of physical ports grouped together into at least one logical port, said method comprising:

receiving the packet on one of said plurality of physical ports;

storing said packet in a memory;

adding a pointer pointing to said packet stored in said memory in a pointer list along with a size of said packet and with a metadata code corresponding to a list of at least one of the plurality of physical ports on which the packet is to be transmitted;

selecting a next pointer at a head of the pointer list corresponding to the packet, and

transmitting the packet corresponding to the next pointer to the at least one of the plurality of physical ports; and

wherein said size of said packet is used by a memory management system of said memory.

2. The method of claim 1 , wherein each metadata code is stored in a metadata lookup table.

3. The method of claim 1 , wherein each metadata code is updated when there is a change in assignment of the at least one of the plurality of physical ports.

4. A system comprising:

a plurality of logical ports and a plurality of physical ports, each of the plurality of logical ports combining at least two of the plurality of physical ports;

a memory configured for storing a plurality of packets;

a pointer pointing to each packet stored in said memory in one of a plurality of pointer lists along with a size of said packet and with an associated metadata code corresponding to a list of the plurality of physical ports on which the respective packet is to be transmitted;

a scheduler for selecting a next pointer corresponding to a next packet at a head of the pointer list, said scheduler configured to identify the updated list of the plurality of physical ports associated with the metadata code of the next packet for transmitting the next packet corresponding to the next pointer in the memory on each physical port identified by the metadata code; and

wherein said size of said packet is used by a memory management system of said memory.

5. The system of claim 4 , wherein each metadata code is stored in a metadata lookup table.

6. The system of claim 4 , wherein each metadata code is updated when there is a change in assignment of at least one of plurality of physical ports on the corresponding list of the plurality of physical ports.

7. The system of claim 4 , wherein each metadata code is updated when there is a failure of at least one of the plurality of physical ports on the corresponding list of the plurality of physical ports.

8. The method of claim 1 , wherein each metadata code is updated when there is a failure of at least one of the plurality of physical ports on the list of at least one of the plurality of physical ports.

Assignments (6)
RELEASE OF SECURITY INTEREST Recorded Oct 10, 2023
From: SILICON VALLEY BANK, A DIVISION OF FIRST-CITIZENS BANK & TRUST COMPANY
To: LES RESEAUX ACCEDIAN INC. / ACCEDIAN NETWORKS INC.
Reel/Frame 065192/0909 →
RELEASE OF SECURITY INTEREST FILED AUGUST 13, 2021 AT REEL/FRAME 057184/0296 Recorded Oct 6, 2023
From: BGC LENDER REP LLC
To: LES RESEAUX ACCEDIAN INC. / ACCEDIAN NETWORKS INC.
Reel/Frame 065178/0452 →
SECURITY INTEREST Recorded Aug 16, 2021
From: LES RESEAUX ACCEDIAN INC. / ACCEDIAN NETWORKS INC.
To: SILICON VALLEY BANK
Reel/Frame 057192/0787 →
SECURITY AGREEMENT Recorded Aug 13, 2021
From: LES RESEAUX ACCEDIAN INC. / ACCEDIAN NETWORKS INC.
To: BGC LENDER REP LLC
Reel/Frame 057184/0296 →
SUPPLEMENT TO INTELLECTUAL PROPERTY SECURITY AGREEMENT Recorded Jun 23, 2021
From: LES RESEAUX ACCEDIAN INC. / ACCEDIAN NETWORKS INC.
To: SILICON VALLEY BANK
Reel/Frame 056713/0868 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Nov 25, 2020
From: ROCHON, STEVE; VIENS, YANICK
To: ACCEDIAN NETWORKS INC.
Reel/Frame 054465/0325 →
Continuity (4)
Continuation 16151672 · Oct 4, 2018
Continuation 15628264 · Jun 20, 2017
Continuation 14625346 · Feb 18, 2015
Related Publication 20210092051A1 · Mar 25, 2021