Gain compensation circuit

1. A circuit comprising:

an amplifier network including a first amplifier and a second amplifier;

a first transistor having a first base, the first transistor being thermally isolated from the first amplifier;

a second transistor having a second base, the second transistor being thermally linked to the first amplifier;

a bias network configured to bias the amplifier network with a reference current, the bias network including a first resistor, a second resistor, and a third transistor; and

coupling circuitry configured to couple the first base to the second base and to couple the first resistor, the first transistor, and the third transistor at a first node.

2. The circuit of claim 1 further comprising a third resistor coupled to the first base and a fourth resistor coupled to the second base.

3. The circuit of claim 1 wherein the coupling circuitry is further configured to couple the first resistor, the second resistor, the first transistor, and the second transistor at a second node.

4. The circuit of claim 1 wherein the third transistor has a third base, a collector, and an emitter, and wherein the coupling circuitry is further configured to couple the emitter to the third base.

5. The circuit of claim 1 wherein the coupling circuitry is further configured to couple the third transistor to the amplifier network.

6. The circuit of claim 1 wherein the amplifier network further includes a second amplifier.

7. The circuit of claim 1 wherein the first transistor is configured to sense an ambient temperature.

8. The circuit of claim 1 wherein the second transistor is configured to sense a temperature at the first amplifier.

9. The circuit of claim 1 wherein the second transistor is situated approximately three microns from the first amplifier.

10. The circuit of claim 1 wherein the second transistor is configured to draw less current in response to heating at the first amplifier.

11. The circuit of claim 10 wherein the amplifier network is configured to draw more current in response to the second transistor drawing less current.

12. The circuit of claim 4 wherein the coupling circuitry is further configured to couple the emitter and the third base at the first node.

13. A circuit comprising:

an amplifier network including a first amplifier;

a first transistor having a first base, the first transistor being thermally isolated from the first amplifier;

a second transistor having a second base, the second transistor being thermally linked to the first amplifier;

a bias network configured to bias the amplifier network with a reference current, the bias network including a first resistor, a second resistor, and a third transistor; and

coupling circuitry configured to couple the first base to the second base and to couple the first resistor, the first transistor, and the third transistor at a first node.

14. The circuit of claim 13 wherein the coupling circuitry is further configured to couple the first resistor, the second resistor, the first transistor, and the second transistor at a second node.

15. The circuit of claim 13 wherein the coupling circuitry is further configured to couple the third transistor to the amplifier network.

16. The circuit of claim 13 wherein the second transistor is configured to draw less current in response to heating at the first amplifier.

17. The circuit of claim 16 wherein the amplifier network is configured to draw more current in response to the second transistor drawing less current.

18. The circuit of claim 13 wherein the coupling circuitry is further configured to couple an emitter and a base of the third transistor at the first node.