IP Library Granted Patent US 11,423,275
Granted Patent B2
US 11,423,275 · App. 17/114,362 · Granted Aug 23, 2022

Passive RFID tag with embedded sensor interface

Inventor: Bo Wang (Doha, QA)
Assignee: QATAR FOUNDATION FOR EDUCATION, SCIENCE AND COMMUNITY DEVELOPMENT
G06K19/0707G06K19/0723G06K19/07327
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Quick Facts
Patent No.
US 11,423,275
App. No.
17/114,362
Granted
Aug 23, 2022
Kind
B2
Abstract

A CMOS analog sensor interface circuit embedded in a passive RFID platform can provide accurate data conversion from analog signals to their digital representations. This interface can also utilize the RFID platform to achieve wireless data transmission. The disclosed sensor interface circuit includes signal filtering, signal amplification, as well as signal digitization. These circuits are all designed under the constraints of low-power operation on a noisy silicon substrate. By using the disclosed circuit design, fully passive wireless sensing network that can integrate with heterogeneous sensors (resistance, voltage, current types) can be designed. The advantages of low-cost, small feature size, and the ability to interface with analog sensors can enable large-scale deployment of such kind of RFIDs, both for consumer electronics like in-door monitoring and industrial sensing applications like the grid, electric vehicle, motor, and other critical infrastructures.

Claims (26)

1. A passive RFID tag comprising:

an RFID chip; and

a sensor interface integrated with the RFID chip in the passive RFID tag, the sensor interface including:

a plurality of analog input pins configured to interface with external sensing devices, wherein a first portion of the analog input pins connect to an internal temperature compensated composite resistor, and wherein a current source is connected to a second portion of the analog input pins,

a first multiplexer configured to be controlled to select an input pair from the plurality of analog input pins for signal conversion, wherein a third portion of the analog input pins connect to the first multiplexer,

an instrumentation amplifier connected to the first multiplexer,

a second multiplexer,

a third multiplexer,

an analog-to-digital converter connected to the second and third multiplexers, and

a digital controller configured to process the digital output bitstream of the analog-to-digital converter.

2. The passive RFID tag of claim 1 , wherein the internal temperature compensated composite resistor is configured to be a resistance reference.

3. The passive RFID tag of claim 1 , wherein the internal temperature compensated composite resistor has a temperature coefficient less than 100 ppm/° C.

4. The passive RFID tag of claim 2 , wherein the internal temperature compensated composite resistor includes a first resistor in parallel with a second resistor, a third resistor in series with the parallel first and second resistors, and a fourth resistor in series with the third resistor.

5. The passive RFID tag of claim 3 , wherein the first and fourth resistors are N+poly resistors, and wherein the second and third resistors are N+diffusion resistors.

6. The passive RFID tag of claim 1 , wherein the RFID chip includes:

a storage capacitor,

an energy harvesting block configured to rectify received frequencies from an RFID reader and store received energy in the storage capacitor,

a power management unit configured to generate power from the received energy stored in the storage capacitor,

a modulator/demodulator configured to decode and encode signals, and

a baseband.

7. The passive RFID tag of claim 6 , wherein a guard-ring isolates the modulator/demodulator and the baseband from the sensor interface.

8. The passive RFID tag of claim 1 , wherein the sensor interface is a CMOS sensor interface circuit.

9. The passive RFID tag of claim 1 , wherein the sensor interface is configured such that the instrumentation amplifier can be bypassed from the multiplexer.

10. The passive RFID tag of claim 1 , wherein the sensor interface includes an over-range detection circuit configured to monitor voltage in order to validate input signals.

11. The passive RFID tag of claim 1 , wherein the sensor interface includes pre-filters connected to the plurality of input pins, the pre-filters being configured to reduce noise received while the passive RFID tag interfaces with an external sensor device.

12. The passive RFID tag of claim 1 , wherein the sensor interface includes a temperature sensor connected to the second multiplexer.

Assignments (2)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jan 17, 2025
From: QATAR FOUNDATION FOR EDUCATION, SCIENCE & COMMUNITY DEVELOPMENT
To: HAMAD BIN KHALIFA UNIVERSITY
Reel/Frame 069936/0656 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Mar 23, 2021
From: WANG, BO
To: QATAR FOUNDATION FOR EDUCATION, SCIENCE AND COMMUNITY DEVELOPMENT
Reel/Frame 055688/0710 →
Continuity (2)
Provisional Application 62944764 · Dec 6, 2019
Related Publication 20210174157A1 · Jun 10, 2021
Cited By (1)
US 12,412,060