LoRa advanced receiver
A LoRa receiver for processing digital chirp spread-spectrum modulated signals with an advanced module for the determination of the timing error and/or of the frequency error arranged to estimate a position of a frequency discontinuity in each symbol, extract one or more frequency-continuous fragments out of each symbol, dechirp the coherent fragments, determine a timing error, and/or a frequency error, and/or a modulation value, and/or a SNR.
1. Radio receiver device comprising: a signal processor configured to process digital chirp spread-spectrum modulated signals that comprise a plurality of symbols constituted by frequency chirps that are cyclically time-shifted replicas of a base chirp profile, said time-shifts being an encoded representation of a transmitted message, wherein the signal processor is further configured to estimate a position of a frequency discontinuity in each symbol, extract one or more frequency-continuous fragments out of each symbol, dechirp the frequency-continuous fragments, determine a timing error, and/or a modulation value, and/or a SNR.
2. The radio receiver device of claim 1 , wherein the signal processor is further configured to choose dynamically one of the frequency-continuous fragments or the entire symbol for the determination of the timing error, and/or modulation value, and/or SNR, based on a detected SNR or modulation value.
3. The radio receiver device of claim 1 , the signal processor being further configured to select two coherent fragments covering a symbol, determine a timing error and/or a frequency error from the phase jumps present at two phase discontinuity at the boundaries between the selected coherent fragments.
4. The radio receiver device of claim 1 , the signal processor being further configured to compute Fourier transforms of the frequency-continuous fragments and to compute a timing error and/or a frequency error from the amplitudes and/or the phases of the Fourier transforms in the neighbourhood of modulation peaks.
5. The radio receiver device of claim 1 , the signal processor being further configured to determine a timing error and feeding the timing error to a Proportional/Integral tracking loop.
6. The radio receiver device of claim 5 , wherein coefficient of the Proportional/Integral tracking loop are dynamically adapted.
7. The radio receiver device of claim 1 , the signal processor being further configured to determine a timing error and compensate the timing error in the time domain and/or in the frequency domain.
8. The radio receiver device of claim 1 , the signal processor being further configured to determine a timing error and timestamp a received frame by combining an average of the timing error and a value of a counter sampled at a predetermined position in the received frame.
9. A system comprising a plurality of gateways having each a receiver according to claim 1 , the gateways being arranged to synchronise their time references by emitting regular transmission and listening to regular transmission from the other gateways, timestamp the received regular transmission.