IP Library Granted Patent US 11,532,585
Granted Patent B2
US 11,532,585 · App. 17/121,353 · Granted Dec 20, 2022

Package containing device dies and interconnect die and redistribution lines

Inventors: Kuo-Chiang Ting (Hsinchu, TW); Chi-Hsi Wu (Hsinchu, TW); Shang-Yun Hou (Jubei, TW); Tu-Hao Yu (Hsinchu, TW); Chia-Hao Hsu (Hsinchu, TW); Ting-Yu Yeh (Hsinchu, TW)
Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
H01L24/24H01L21/4853H01L21/4857H01L21/561H01L21/6835H01L23/49816H01L23/5383H01L23/5385H01L23/5386H01L23/5389H01L24/08H01L24/19H01L24/25H01L24/32H01L24/73H01L25/18H01L25/50H01L21/563H01L23/3128H01L2221/68345H01L2221/68359H01L2224/08145H01L2224/08235H01L2224/08265H01L2224/24011H01L2224/24137H01L2224/24146H01L2224/25171H01L2224/32227H01L2224/73267H01L2224/83001
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Quick Facts
Patent No.
US 11,532,585
App. No.
17/121,353
Granted
Dec 20, 2022
Kind
B2
Abstract

A method includes bonding a first device die and a second device die to an interconnect die. The interconnect die includes a first portion over and bonded to the first device die, and a second portion over and bonded to the second device die. The interconnect die electrically connects the first device die to the second device die. The method further includes encapsulating the interconnect die in an encapsulating material, and forming a plurality of redistribution lines over the interconnect die.

Claims (48)

1. A package comprising:

a plurality of device dies comprising a first die and a second die;

an interconnect structure comprising a plurality of redistribution lines (RDLs), wherein the plurality of redistribution lines are distributed in a plurality of RDL layers;

an encapsulant comprising a portion between the plurality of device dies and the interconnect structure;

an interconnect die in the encapsulant, wherein the interconnect die interconnects the first die and the second die in the plurality of device dies;

a die-attach film between, and contacting, the interconnect die and the interconnect structure; and

an air gap, wherein the die-attach film is exposed to the air gap.

2. The package of claim 1 further comprising:

a through-via penetrating through the encapsulant, wherein the through-via electrically couples the interconnect structure and the second die.

3. The package of claim 2 , wherein the through-via physically contacts both of the interconnect structure and the second die.

4. The package of claim 1 further comprising an integrated passive device bonded to the first die.

5. The package of claim 1 , wherein an entirety of the encapsulant is between the plurality of device dies and the interconnect structure.

6. The package of claim 1 , wherein the encapsulant comprises:

a first portion between the plurality of device dies and the interconnect structure; and

a second portion encapsulating the plurality of device dies therein.

7. The package of claim 1 , wherein the encapsulant comprises an additional portion, with the additional portion comprising:

a first surface in contact with the interconnect die; and

a second surface in contact with the interconnect structure, wherein the first surface and the second surface are opposing surfaces of the additional portion.

8. The package of claim 1 , wherein the interconnect die is free from active devices therein.

9. The package of claim 1 , wherein the encapsulant comprises a molding compound.

10. The package of claim 1 , wherein opposing edges of the die-attach film are vertically aligned with corresponding opposing edges of the interconnect die.

11. A package comprising:

a first device die comprising a first electrical connector and a second electrical connector;

a second device die comprising a third electrical connector;

an interconnect die comprising:

a fourth electrical connector bonding to the first electrical connector of the first device die;

a fifth electrical connector bonding to the third electrical connector of the second device die; and

an electrical path in the interconnect die, wherein the electrical path electrically interconnects the fourth electrical connector and the fifth electrical connector;

an interconnect structure comprising a redistribution line;

a through-via interconnects, and is physically joined to, the second electrical connector and the redistribution line;

an integrated passive device bonded to the first device die;

an additional redistribution line in the interconnect structure; and

a die-attach film attaching the integrated passive device to the additional redistribution line.

12. The package of claim 11 further comprising an additional die-attach film, wherein the interconnect die is attached to the redistribution line through the additional die-attach film.

13. The package of claim 12 further comprising an air gap, wherein the die-attach film is exposed to the air gap.

14. The package of claim 11 further comprising an encapsulant encapsulating the interconnect die therein.

15. The package of claim 14 , wherein the encapsulant further encapsulates the redistribution line therein.

16. The package of claim 11 , wherein the interconnect die is free from active devices therein.

17. A package comprising:

a plurality of device dies;

an interconnect die, wherein the interconnect die electrically interconnects two of the plurality of device dies;

an interconnect structure comprising a plurality of redistribution lines, wherein the plurality of redistribution lines are distributed in a plurality of redistribution line layers, and wherein the interconnect die is free from active devices and passive devices therein;

a plurality of through-vias, wherein each through-via in the plurality of through-vias is in physical contact with one device die in the plurality of device dies and one redistribution line in the plurality of redistribution lines;

a die-attach film contacting a redistribution line in the interconnect structure; and

a passive device die contacting the die-attach film, wherein the passive device die is bonded to a die in the plurality of device dies.

18. The package of claim 17 , wherein the interconnect die comprises a semiconductor substrate, and the semiconductor substrate is free from through-vias penetrating through the semiconductor substrate.

19. The package of claim 17 further comprising an air gap, wherein the interconnect structure is exposed to the air gap.

20. The package of claim 17 , wherein the die-attach film further contacts an additional redistribution line in the interconnect structure.

Continuity (2)
Continuation 15813538 · Nov 15, 2017
Related Publication 20210098408A1 · Apr 1, 2021