Semiconductor devices
A technique, comprising: forming in situ on a support substrate: a first metal layer; a light-absorbing layer after the first metal layer; a conductor pattern after the light-absorbing layer; and a semiconductor layer after the conductor pattern; patterning the semiconductor layer using a resist mask to form a semiconductor pattern defining one or more semiconductor channels of one or more semiconductor devices; and patterning the light-absorbing layer using the resist mask and the conductor pattern, so as to selectively retain the light-absorbing layer in regions that are occupied by at least one of the resist mask and the conductor pattern.
1. A method, comprising:
forming in situ on a support substrate: a first metal layer; a light-absorbing layer after the first metal layer; a conductor pattern after the light-absorbing layer; and a semiconductor layer after the conductor pattern;
patterning the semiconductor layer using a resist mask to form a semiconductor pattern defining one or more semiconductor channels of one or more semiconductor devices; and
patterning the light-absorbing layer using the resist mask and the conductor pattern, so as to selectively retain the light-absorbing layer in regions that are occupied by at least one of the resist mask and the conductor pattern.
2. The method according to claim 1 , wherein the light-absorbing layer exhibits a white light optical density (in a direction substantially perpendicular to the plane of the support substrate) of at least about 1, and a white light total reflectance of no more than about 10%.
3. The method according to claim 1 , wherein the light-absorbing layer comprises an insulator material, preferably having a sheet resistance of greater than 1 MOhm/square.
4. The method according to claim 1 , wherein the light-absorbing layer is separated from the semiconductor layer by a distance (in a direction substantially perpendicular to the plane of the support substrate) of no more than about 500 nm.
5. The method according to claim 1 , wherein the light-absorbing layer interfaces with the one or more semiconductor channels.
6. The method according to claim 1 , wherein the first metal layer is a light-shielding metal pattern.
7. The method according to claim 1 , wherein the one or more semiconductor devices form part of a control component half-cell for a liquid crystal cell comprising liquid crystal material between the control component half-cell and another half-cell comprising an array of colour filters in a black matrix.
8. The method according to claim 1 , wherein patterning the semiconductor layer and patterning the light-absorbing layer comprises an etching treatment to which the semiconductor layer and the light-absorbing layer are not resistant, and to which the resist mask and conductor pattern are resistant.
9. The method according to claim 1 , comprising forming a first gate dielectric layer over the semiconductor layer.
10. The method according to claim 9 , comprising patterning the first gate dielectric layer using the resist mask.
11. The method according to claim 10 , wherein patterning the first gate dielectric layer, patterning the semiconductor layer, and patterning the light-absorbing layer comprises an etching treatment to which none of the first gate dielectric layer, the semiconductor layer and the light-absorbing layer are resistant, and to which the resist mask and conductor pattern are resistant.
12. The method according to claim 11 , comprising forming a second gate dielectric layer after patterning the first gate dielectric layer, the semiconductor layer, and the light-absorbing layer.
13. The method according to claim 12 , comprising forming over the second gate dielectric layer a metal pattern defining an array of gate conductors for the one or more semiconductor devices.
14. The method according to claim 1 , comprising: forming a back channel dielectric layer after forming the light-absorbing layer and before forming the conductor pattern, wherein the back channel dielectric layer interfaces with the one or more semiconductor channels.
15. The method according to claim 14 , comprising patterning the back channel dielectric layer, wherein patterning the back channel dielectric layer, patterning the semiconductor layer and patterning the light-absorbing layer comprises an etching treatment to which none of the semiconductor layer, back channel dielectric layer and light-absorbing layer are resistant, and to which the resist mask and conductor pattern are resistant.
16. The method according to claim 14 , comprising forming the first metal layer over a planarization layer, and wherein the back channel dielectric layer comprises a layer of a first material, and the planarization layer comprises a layer of the first material.
17. The method according to claim 1 , wherein the light-absorbing layer comprises an organic polymer with inorganic light-absorbing particles dispersed therein.
18. The method according to claim 17 , wherein the inorganic light-absorbing particles comprises carbon black.
19. The method according to claim 1 , wherein the first metal layer primarily functions to shield the semiconductor channels from light incident on the support substrate from a side of the support substrate opposite to the first metal layer.
20. The method according to claim 1 , wherein the light-absorbing layer primarily functions to absorb scattered light propagating in a direction substantially parallel to the light-absorbing layer.