IP Library Granted Patent US 11,843,939
Granted Patent B2
US 11,843,939 · App. 17/124,428 · Granted Dec 12, 2023

Secure messaging for outage events

Inventors: Kalvinder Pal Singh (Miami, AU); Darin Byron Johnson (San Jose, CA); Zoltan Peter Kiss (Los Altos, CA)
Assignee: ITRON, INC.
H04W12/033G06F1/3275G06F1/3287H04L9/0819H04L9/0894H04L41/06H04L41/28H04L63/0428H04L63/062H04L63/123H04W12/047
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Quick Facts
Patent No.
US 11,843,939
App. No.
17/124,428
Granted
Dec 12, 2023
Kind
B2
Abstract

Various embodiments disclose a computer-implemented method for sending a message associated with an outage event, comprising, at a first node in a network, receiving a key from a second node in the network, wherein the second node is adjacent to the first node; storing the key in a first memory, wherein the first memory is capable of operating in a low power mode; detecting an outage event; in response to detecting the outage event, operating a first processor in the low power mode; and via the first processor operating in the low power mode: generating a message, securing the message using the key, and sending the message to the second node.

Claims (65)

1. A method comprising:

while operating a first node in a network in a normal power mode using a first processor and a first memory:

receiving, by the first processor, a key from a second node in the network, wherein the second node is adjacent to the first node;

storing, by the first processor, the key in the first memory, wherein the first memory is capable of switching between operating in the normal power mode and operating in a low power mode where an amount of power used by the first memory is reduced; and

detecting, by the first processor, an outage event;

in response to detecting the outage event, switching to operating the first node and the first memory in the low power mode using the first processor or a second processor; and

while operating the first node and the first memory in the low power mode:

generating, by the first processor or the second processor, a message;

securing, by the first processor or the second processor, the message using the key that is retrieved from the first memory; and

sending, by the first processor or the second processor, the message to the second node.

2. The method of claim 1 , wherein the first processor is a main processor of the first node.

3. The method of claim 1 , wherein the first node comprises the first memory and a second memory distinct from the first memory.

4. The method of claim 1 , wherein:

the first memory is a main memory of the first node; and

the method further comprises, in response to detecting the outage event, operating the first memory in the low power mode.

5. The method of claim 1 , wherein securing the message using the key comprises retrieving the key from the first memory.

6. The method of claim 1 , wherein the key is generated by the second node.

7. The method of claim 1 , wherein the message comprises a key identifier of the key.

8. The method of claim 1 , wherein:

the network comprises a plurality of nodes adjacent to the first node, wherein the plurality of nodes includes the second node, and

wherein the method further comprises selecting a subset of the plurality of nodes adjacent to the first node as designated recipients of outage event messages sent by the first node, wherein the subset includes the second node.

9. The method of claim 1 , further comprising:

receiving a second message from a third node in the network adjacent to the first node;

validating the second message; and

forwarding the second message to the second node, wherein the forwarded second message is secured using the key.

10. The method of claim 9 , wherein the receiving the second message, validating, and forwarding steps are performed by the first processor or the second processor operating in the low power mode in accordance with a determination that the outage event is detected.

11. The method of claim 9 , wherein the receiving the second message, validating, and forwarding steps are performed by the first processor at the first node operating in the normal power mode after determining that the outage event is no longer detected.

12. One or more non-transitory computer-readable media storing program instructions that, when executed by one or more processors, cause the one or more processors at a first node in a network to perform the steps of:

while operating the first node in a normal power mode using a first processor included in the one or more processors and a first memory:

receiving, by the first processor, a key from a second node in the network, wherein the second node is adjacent to the first node;

storing, by the first processor, the key in the first memory, wherein the first memory is capable of switching between operating in the normal power mode and operating in a low power mode where an amount of power used by the first memory is reduced; and

detecting, by the first processor, an outage event;

in response to detecting the outage event, switching to operating the first node and the first memory in the low power mode using the first processor or a second processor included in the one or more processors; and

while operating the first node and the first memory in the low power mode:

generating, by the first processor or the second processor, a message;

securing, by the first processor or the second processor, the message using the key that is retrieved from the first memory; and

sending, by the first processor or the second processor, the message to the second node.

13. The one or more non-transitory computer-readable storage media of claim 12 , wherein the first node comprises the first processor and the second processor, and wherein the first processor is a main processor of the first node.

14. The one or more non-transitory computer-readable storage media of claim 12 , wherein the first node comprises the first memory and a second memory distinct from the first memory.

15. The one or more non-transitory computer-readable storage media of claim 12 , wherein securing the message using the key comprises retrieving the key from the first memory via the first processor or the second processor operating in the low power mode.

16. The one or more non-transitory computer-readable storage media of claim 12 , wherein the steps further comprise:

receiving a second message from a third node in the network adjacent to the first node;

validating the second message; and

forwarding the second message to the second node, wherein the forwarded second message is secured using the key.

17. The one or more non-transitory computer-readable storage media of claim 12 , wherein:

the network comprises a plurality of nodes adjacent to the first node, wherein the plurality of nodes includes the second node, and

wherein the steps further comprise selecting a subset of the plurality of nodes adjacent to the first node as designated recipients of outage event messages sent by the first node, wherein the subset includes the second node.

18. The one or more non-transitory computer-readable storage media of claim 17 , wherein the steps further comprise:

for each node in the selected subset:

generating a second key based on a trust level associated with the node; and

sending the generated second key to the node.

19. A system, comprising:

a plurality of nodes included in a network;

a first node included in the plurality of nodes;

a second node included in the plurality of nodes and adjacent to the first node, the second node configured to perform the steps of:

while operating the second node in a normal power mode using a first processor and a first memory:

receiving, by the first processor, a key from the first node;

storing, by the first processor, the key in the first memory at the second node, wherein the first memory is capable of switching between operating in the normal power mode and operating in a low power mode where an amount of power used by the first memory is reduced; and

detecting, by the first processor, an outage event at the second node;

in response to detecting the outage event, switching to operating the second node and the first memory in the low power mode using the first processor or a second processor; and

while operating the second node and the first memory in the low power mode:

generating, by the first processor or the second processor, a message;

retrieving, by the first processor or the second processor, the key from the first memory that is retrieved from the first memory;

securing, by the first processor or the second processor, the message using the key; and

sending, by the first processor or the second processor, the message to the first node.

Assignments (2)
SECURITY INTEREST Recorded Sep 15, 2025
From: ITRON, INC.
To: WELLS FARGO BANK, NATIONAL ASSOCIATION
Reel/Frame 072870/0873 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Dec 17, 2020
From: SINGH, KALVINDER PAL; JOHNSON, DARIN BYRON; KISS, ZOLTAN PETER
To: ITRON, INC.
Reel/Frame 054679/0371 →