IP Library Granted Patent US 11,539,477
Granted Patent B2
US 11,539,477 · App. 17/128,185 · Granted Dec 27, 2022

Transmitting device and buffer control method

Inventors: Yoshiaki Ohta (Yokohama, JP); Takayoshi Ode (Yokohama, JP); Yoshihiro Kawasaki (Kawasaki, JP); Nobuhisa Aoki (Kawasaki, JP)
Assignee: FUJITSU LIMITED
H04L1/1874H04W28/04H04W76/27H04W80/02
View Patent ↗
Loading inventors, assignments & file history…
Monitor This Case
Get email alerts when status or documents change.
Order Certified Copies
Most orders are placed with the USPTO same day — all within 24 business hours.
Order via The Patent Place →
Pre-filled with this patent's details
Quick Facts
Patent No.
US 11,539,477
App. No.
17/128,185
Granted
Dec 27, 2022
Kind
B2
Abstract

A transmitting device includes: a first layer processor configured to include a buffer to store therein transmission data, the first layer processor configured to execute processing for a first layer on the transmission data; a second layer processor configured to execute processing for a second layer that differs from the first layer on the transmission data; and a transmitter configured to transmit the transmission data processed by the first layer processor and the second layer processor. The first layer processor discards the transmission data stored in the buffer in accordance with a parameter used for transmission control in the processing for the second layer.

Claims (27)

1. A transmitting device comprising:

a first layer processor configured to include a buffer to store therein transmission data, the first layer processor configured to execute processing for a first layer on the transmission data;

a second layer processor configured to execute processing for a second layer that differs from the first layer on the transmission data; and

a transmitter configured to transmit the transmission data processed by the first layer processor and the second layer processor, wherein

the second layer processor executes processing for a medium access control (MAC) layer on the transmission data, and

the first layer processor executes processing for a packet data convergence protocol (PDCP) layer on the transmission data, and discards the transmission data stored in the buffer, when a time corresponding to a maximum transmission time for a physical uplink shared channel (PUSCH) used for priority control for the MAC layer expires after the transmission data has been stored in the buffer, the time being shorter than a discard time that is predetermined in the PDCP layer.

2. The transmitting device according to claim 1 , wherein

the first layer processor executes processing for a radio link control (RLC) layer on the transmission data, and

the maximum transmission time is a time shorter than a discard time that is predetermined time in the RLC layer.

3. The transmitting device according to claim 1 , wherein

the second layer processor executes processing for an RLC layer on the transmission data, and

the first layer processor discards the transmission data stored in the buffer, when a re-transmission count for the transmission data stored in the buffer reaches a maximum re-transmission count used for re-transmission control for the RLC layer.

4. The transmitting device according to claim 1 , wherein

the transmitting device is a mobile terminal.

5. A buffer control method comprising:

executing processing for a packet data convergence protocol (PDCP) layer on transmission data stored in a buffer;

executing processing for a medium access control (MAC) layer on the transmission data; and

discarding the transmission data stored in the buffer, when a time corresponding to a maximum transmission time for a physical uplink shared channel (PUSCH) used for priority control for the MAC layer expires after the transmission data has been stored in the buffer, the time being shorter than a discard time that is predetermined in the PDCP layer.

6. A base station device that controls a terminal device by radio resource control (RRC) signaling, the base station device comprising:

a controller configured to notify the terminal device, by the RRC signaling, of a time corresponding to a maximum transmission time for a physical uplink shared channel (PUSCH) used for priority control for a medium access control (MAC) layer expires after transmission data has been stored in a buffer of the terminal device, the time being shorter than a discard time that is predetermined in a packet data convergence protocol (PDCP) layer.

7. A wireless communication system comprising a terminal device and a base station device that controls the terminal device by radio resource control (RRC) signaling, wherein

the terminal device comprises:

a first layer processor that includes a buffer configured to store therein transmission data, the first layer processor being configured to execute processing for a first layer on the transmission data;

a second layer processor configured to execute processing for a second layer that differs from the first layer on the transmission data; and

a transmitter configured to transmit the transmission data processed by the first layer processor and the second layer processor, wherein

the second layer processor executes processing for a medium access control (MAC) layer on the transmission data, and

the first layer processor executes processing for a packet data convergence protocol (PDCP) layer on the transmission data, and discards the transmission data stored in the buffer, when a time notified from the base station device by the RRC signaling and corresponding to a maximum transmission time for a physical uplink shared channel (PUSCH) used for priority control for the MAC layer expires after the transmission data has been stored in the buffer, the time being shorter than a discard time that is predetermined in the PDCP layer.

Assignments (2)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Aug 13, 2025
From: FUJITSU LIMITED
To: 1FINITY INC.
Reel/Frame 072436/0149 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Dec 20, 2020
From: OHTA, YOSHIAKI; ODE, TAKAYOSHI; KAWASAKI, YOSHIHIRO; AOKI, NOBUHISA
To: FUJITSU LIMITED
Reel/Frame 054703/0802 →
Continuity (2)
Continuation PCTJP2018023500 · Jun 20, 2018
Related Publication 20210111841A1 · Apr 15, 2021
Cited By (1)
US 12,621,711