IP Library Granted Patent US 11,483,014
Granted Patent B2
US 11,483,014 · App. 17/130,824 · Granted Oct 25, 2022

System and method for soft decoding without additional reads

Inventor: Kyungjin Kim (San Jose, CA)
Assignee: SK hynix Inc.
H03M13/45G11C16/0483G11C16/26G11C16/349
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Quick Facts
Patent No.
US 11,483,014
App. No.
17/130,824
Granted
Oct 25, 2022
Kind
B2
Abstract

A controller of a memory system performs a soft decoding without additional reads. The controller applies each of read voltages to cells to obtain a corresponding cell count and corresponding data, stores the obtained data, and processes the stored data. The controller determines a set of parameters, based on (i) the read voltages, (ii) cell counts corresponding to the read voltages and (iii) a non-negative regularization parameter. The controller estimates an optimal read voltage based on the set of parameters, generates log-likelihood ratio (LLR) values using the processed data and the optimal read voltage and performs soft decoding using the LLR values.

Claims (137)

1. A memory system comprising:

a memory device including a plurality of cells; and

a controller configured to:

apply each of a plurality of read voltages to the plurality of cells to obtain a corresponding cell count and corresponding data;

store the obtained data associated with the plurality of read voltages;

process the stored data;

determine a set of parameters, based on (i) the plurality of read voltages, (ii) the cell counts corresponding to the plurality of read voltages and (iii) a non-negative regularization parameter which is based on one or more properties of the memory device and is selected to reduce a variance of at least one parameter of the set of parameters;

estimate an optimal read voltage based on the set of parameters;

generate log-likelihood ratio (LLR) values using the processed data and the optimal read voltage; and

perform soft decoding using the LLR values.

2. The memory system of claim 1 , wherein the plurality of cell counts comprises N cell counts, the set of parameters comprises M parameters, N and M are positive integers, and N is greater than (M+1),

wherein the plurality of cell counts is denoted (y 0 , y 1 , . . . , y N−1 ) and the plurality of read voltages is denoted (x 0 , x 1 , . . . , x N−1 ), the set of parameters is denoted (a 0 , a 1 , . . . , a M−1 ), the non-negative regularization parameter is denoted λ, and the set of parameters ã is given by ã=(X T X+λI) −1 X T y,

wherein ã=[a 0 , a 1 , . . . , a M−1 ] T and y=[y 0 , y 1 , . . . , y N−1 ],

wherein

X

=

[

1

x

0

x

0

2

x

0

M

-

1

1

x

N

-

1

x

N

-

1

2

x

N

-

1

M

-

1

]

,

wherein I is an M×M identity matrix and T denotes a transpose operation, and wherein N=3, M=2 and the optimal read voltage is determined by −a 1 /(2a 2 ).

3. The memory system of claim 1 , wherein the one or more properties of the memory device comprise a number of program/erase (PE) cycles or a retention parameter.

4. The memory system of claim 1 , wherein the controller stores the obtained data in a buffer when the corresponding cell count is within a target search window.

5. The memory system of claim 4 , wherein the controller

obtains a first cell count and first data corresponding to a first read voltage among the plurality of read voltages;

determines whether the first cell count is within the target search window; and

when it is determined that the first cell count is within the target search window, stores the first data in the buffer.

6. The memory system of claim 5 , wherein the controller

when it is determined that the first cell count is out of the target search window, determines a second read voltage among the plurality of read voltages, the second read voltage corresponding to an addition of the first read voltage and a set offset or a subtraction of the set offset from the first rad voltage;

obtains a second cell count and second data corresponding to the second read voltage;

determines whether the second cell count is within the target search window; and

when it is determined that the second cell count is within the target search window, stores the second data in the buffer.

7. The memory system of claim 6 , wherein the controller

generates a first LLR value using the first data or the second data; and

generates a second LLR value using the optimal read voltage.

8. A method for operating a memory system, which includes a memory device including a plurality of cells and a controller, the method comprising:

applying each of a plurality of read voltages to the plurality of cells to obtain a corresponding cell count and corresponding data;

storing the obtained data associated with the plurality of read voltages;

processing the stored data;

determining a set of parameters, based on (i) the plurality of read voltages, (ii) the cell counts corresponding to the plurality of read voltages and (iii) a non-negative regularization parameter which is based on one or more properties of the memory device and is selected to reduce a variance of at least one parameter of the set of parameters;

estimating an optimal read voltage based on the set of parameters;

generating log-likelihood ratio (LLR) values using the processed data and the optimal read voltage; and

performing soft decoding using the LLR values.

9. The method of claim 8 , wherein the plurality of cell counts comprises N cell counts, the set of parameters comprises M parameters, N and M are positive integers, and N is greater than (M+1),

wherein the plurality of cell counts is denoted (y 0 , y 1 , . . . , y N−1 ) and the plurality of read voltages is denoted (x 0 , x 1 , . . . , x N−1 ), the set of parameters is denoted (a 0 , a 1 , . . . , a M−1 ), the non-negative regularization parameter is denoted λ, and the set of parameters ã is given by ã=(X T X+λI) −1 X T y,

wherein ã=[a 0 , a 1 , . . . , a M−1 ] T and y=[y 0 , y 1 , . . . , y N−1 ] T ,

wherein

X

=

[

1

x

0

x

0

2

x

0

M

-

1

1

x

N

-

1

x

N

-

1

2

x

N

-

1

M

-

1

]

,

wherein I is an M×M identity matrix and T denotes a transpose operation, and wherein N=3, M=2 and the optimal read voltage is determined by −a 1 /(2a 2 ).

10. The method of claim 8 , wherein the one or more properties of the memory device comprise a number of program/erase (PE) cycles or a retention parameter.

11. The method of claim 8 , wherein the storing includes:

storing the obtained data in a buffer when the corresponding cell count is within a target search window.

12. The method of claim 11 , wherein the applying includes obtaining a first cell count and first data corresponding to a first read voltage among the plurality of read voltages,

wherein the storing includes:

determining whether the first cell count is within the target search window; and

when it is determined that the first cell count is within the target search window, storing the first data in the buffer.

13. The method of claim 12 , further comprising:

when it is determined that the first cell count is out of the target search window, determining a second read voltage among the plurality of read voltages, the second read voltage corresponding to an addition of the first read voltage and a set offset or a subtraction of the set offset from the first rad voltage;

obtaining a second cell count and second data corresponding to the second read voltage;

determining whether the second cell count is within the target search window; and

when it is determined that the second cell count is within the target search window, storing the second data in the buffer.

14. The method of claim 13 , wherein the LLR values include:

a first LLR value generated using the first data or the second data; and

a second LLR value generated using the optimal read voltage.

Assignments (2)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jul 16, 2021
From: SK HYNIX MEMORY SOLUTIONS AMERICA INC.
To: SK HYNIX INC.
Reel/Frame 056883/0151 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Dec 22, 2020
From: KIM, KYUNGJIN
To: SK HYNIX MEMORY SOLUTIONS AMERICA INC.
Reel/Frame 054728/0369 →
Continuity (1)
Related Publication 20220200633A1 · Jun 23, 2022
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