IP Library Granted Patent US 11,386,039
Granted Patent B2
US 11,386,039 · App. 17/130,878 · Granted Jul 12, 2022

Userspace split data-centric heterogeneous computing architecture

Inventors: Jinpeng Liu (Shanghai, CN); Andrew Anzhou Hou (Shanghai, CN); Christopher S. MacLellan (Uxbridge, MA)
Assignee: EMC IP Holding Company LLC
G06F15/7896G06F13/20
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Quick Facts
Patent No.
US 11,386,039
App. No.
17/130,878
Granted
Jul 12, 2022
Kind
B2
Abstract

One example method includes transmitting, by an application running in a host CPU, a notification to an application in a coprocessor/accelerator indicating that inbound data generated by the application is ready, receiving, by the application in the coprocessor/accelerator, the notification and delegating, by the application in the coprocessor/accelerator, an IO command to the application running in the host CPU, forwarding, by the application running in the host CPU, the IO command to an OS of the host CPU, transmitting, by the OS of the host CPU, an IO request to an IO device, initiating, by the IO device, a P2PDMA to transmit data associated with the IO request to a memory of the coprocessor/accelerator, and processing, by the application in the coprocessor/accelerator, the data.

Claims (43)

1. A method, comprising:

transmitting, by an application running in a host CPU, a notification to an application in a coprocessor/accelerator indicating that inbound data generated by the application is ready;

receiving, by the application in the coprocessor/accelerator, the notification and delegating, by the application in the coprocessor/accelerator, an IO command to the application running in the host CPU;

forwarding, by the application running in the host CPU, the IO command to an OS of the host CPU;

transmitting, by the OS of the host CPU, an IO request to an IO device;

initiating, by the IO device, a P2PDMA to transmit data associated with the IO request to a memory of the coprocessor/accelerator; and

processing, by the application in the coprocessor/accelerator, the data.

2. The method as recited in claim 1 , wherein the IO command transmitted by the application in the coprocessor/accelerator is sent by way of an RPC stub.

3. The method as recited in claim 1 , wherein the IO command transmitted by the application running in the coprocessor/accelerator is received by way of a proxy in the host CPU.

4. The method as recited in claim 1 , wherein communication between an RPC stub of the coprocessor/accelerator and a proxy of the host CPU takes place in an application userspace.

5. The method as recited in claim 1 , wherein the notification is transmitted by a coordinator module of the application running in the host CPU.

6. The method as recited in claim 1 , wherein the IO device comprises one of an SSD, or a NIC.

7. The method as recited in claim 1 , wherein forwarding, by the application running in the host CPU, the IO command to an OS of the host CPU, is performed by a proxy of the application running in the host CPU.

8. The method as recited in claim 1 , wherein the operations further comprise retrieving the data from an on-chip memory of the IO device.

9. The method as recited in claim 1 , wherein after the memory of the coprocessor/accelerator receives the data from the IO device, the data is forwarded, by way of an OS of the application of the coprocessor/accelerator, to a data processor of the application of the coprocessor/accelerator.

10. The method as recited in claim 1 , wherein:

the following operations each comprise transmission of a control signal:

transmitting, by the application running in the host CPU, the notification to the application in the coprocessor/accelerator indicating that the inbound data generated by the application is ready;

receiving, by the application in the coprocessor/accelerator, the notification and delegating, by the application in the coprocessor/accelerator, the IO command to the application running in the host CPU;

forwarding, by the application running in the host CPU, the IO command to the OS of the host CPU;

transmitting, by the OS of the host CPU, the IO request to the IO device; and

the following operation comprises transmission of a data signal:

initiating, by the IO device, the P2PDMA to transmit the data associated with the IO request to the memory of the coprocessor/accelerator.

11. The method as recited in claim 1 , wherein except for the P2PDMA, no other transmission of data is performed.

12. The method as recited in claim 1 , wherein:

control operations are performed only in a control plane that includes the host CPU but does not include the coprocessor/accelerator; and

data operations are performed only in a data plane that includes the coprocessor/accelerator but does not include the host CPU.

13. A method, comprising:

storing, by an application running in a coprocessor/accelerator, processed data in a memory of the coprocessor/accelerator;

delegating, by the application running in the coprocessor/accelerator, an IO command to an application running in a host CPU;

forwarding, by the application running in the host CPU, the IO command to an OS of the host CPU;

processing, by the OS of the host CPU, the IO command;

initiating, by the OS of the host CPU, an IO request to an IO device; and

initiating, by the IO device, a P2PDMA to transmit the processed data from a memory of the coprocessor/accelerator to an on-chip memory of the IO device.

14. The method as recited in claim 13 , wherein the IO command forwarded by the application in the coprocessor/accelerator is sent by way of an RPC stub.

15. The method as recited in claim 13 , wherein the IO command forwarded by the application running in the coprocessor/accelerator is received by way of a proxy in the host CPU.

16. The method as recited in claim 13 , wherein communication between an RPC stub of the coprocessor/accelerator and a proxy of the host CPU takes place in an application userspace.

17. The method as recited in claim 13 , wherein the IO device comprises one of an SSD, ora NIC.

18. The method as recited in claim 13 , wherein except for the P2PDMA, no other transmission of data is performed.

19. The method as recited in claim 13 , wherein:

control operations are performed only in a control plane that includes the host CPU but does not include the coprocessor/accelerator; and

data operations are performed only in a data plane that includes the coprocessor/accelerator but does not include the host CPU.

20. The method as recited in claim 13 , wherein prior to storage of the processed data in the memory of the coprocessor/accelerator, the processed data is transmitted to the memory from a data processor of the coprocessor/accelerator by an OS of the coprocessor/accelerator.

Assignments (9)
RELEASE OF SECURITY INTEREST IN PATENTS PREVIOUSLY RECORDED AT REEL/FRAME (055479/0051) Recorded Jun 10, 2022
From: THE BANK OF NEW YORK MELLON TRUST COMPANY, N.A., AS NOTES COLLATERAL AGENT
To: EMC IP HOLDING COMPANY LLC; DELL PRODUCTS L.P.
Reel/Frame 062021/0663 →
RELEASE OF SECURITY INTEREST IN PATENTS PREVIOUSLY RECORDED AT REEL/FRAME (056136/0752) Recorded Jun 10, 2022
From: THE BANK OF NEW YORK MELLON TRUST COMPANY, N.A., AS NOTES COLLATERAL AGENT
To: EMC IP HOLDING COMPANY LLC; DELL PRODUCTS L.P.
Reel/Frame 062021/0771 →
RELEASE OF SECURITY INTEREST IN PATENTS PREVIOUSLY RECORDED AT REEL/FRAME (055479/0342) Recorded Jun 10, 2022
From: THE BANK OF NEW YORK MELLON TRUST COMPANY, N.A., AS NOTES COLLATERAL AGENT
To: EMC IP HOLDING COMPANY LLC; DELL PRODUCTS L.P.
Reel/Frame 062021/0460 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Apr 28, 2022
From: LIU, JINPENG; HOU, ANDREW ANZHOU; MACLELLAN, CHRISTOPHER S.
To: EMC IP HOLDING COMPANY LLC
Reel/Frame 059761/0037 →
RELEASE OF SECURITY INTEREST AT REEL 055408 FRAME 0697 Recorded Nov 2, 2021
From: CREDIT SUISSE AG, CAYMAN ISLANDS BRANCH
To: DELL PRODUCTS L.P.; EMC IP HOLDING COMPANY LLC
Reel/Frame 058001/0553 →
SECURITY INTEREST Recorded Mar 3, 2021
From: EMC IP HOLDING COMPANY LLC; DELL PRODUCTS L.P.
To: THE BANK OF NEW YORK MELLON TRUST COMPANY, N.A., AS NOTES COLLATERAL AGENT
Reel/Frame 055479/0342 →
SECURITY INTEREST Recorded Mar 3, 2021
From: EMC IP HOLDING COMPANY LLC; DELL PRODUCTS L.P.
To: THE BANK OF NEW YORK MELLON TRUST COMPANY, N.A., AS NOTES COLLATERAL AGENT
Reel/Frame 056136/0752 →
SECURITY INTEREST Recorded Mar 3, 2021
From: EMC IP HOLDING COMPANY LLC; DELL PRODUCTS L.P.
To: THE BANK OF NEW YORK MELLON TRUST COMPANY, N.A., AS NOTES COLLATERAL AGENT
Reel/Frame 055479/0051 →
SECURITY AGREEMENT Recorded Feb 25, 2021
From: EMC IP HOLDING COMPANY LLC; DELL PRODUCTS L.P.
To: CREDIT SUISSE AG, CAYMAN ISLANDS BRANCH
Reel/Frame 055408/0697 →
Continuity (2)
Continuation 16743553 · Jan 15, 2020
Related Publication 20210216496A1 · Jul 15, 2021