Using stateful traffic management data to perform packet processing
Some embodiments provide a method for an ingress packet processing pipeline of a network forwarding integrated circuit (IC). The ingress packet processing pipeline is for receiving packets from a port of the network forwarding IC and processing the packets to assign different packets to different queues of a traffic management unit of the network forwarding IC. The method receives state data from the traffic management unit. The method stores the state data in a stateful table. The method assigns a particular packet to a particular queue based on the state data received from the traffic management unit and stored in the stateful table.
1. A method performed by a network forwarding integrated circuit (IC), the method comprising:
receiving queue depth information at a non-final stage of a packet processing pipeline from a certain stage of the packet processing pipeline, the non-final stage being subsequent to the certain stage in the packet processing pipeline; and
at the non-final stage of the packet processing pipeline, allocating a packet to a particular queue based on the received queue depth information;
wherein:
the certain stage comprises a match-action stage;
the queue depth information is to be stored, at least in part, in multiple copies of match-action stage table data stored in the match-action stage; and
the non-final stage is to write the queue depth information to at least one memory location identified by the certain stage.
2. The method of claim 1 , wherein the queue depth information comprises an amount of data stored in at least one queue.
3. The method of claim 1 , wherein the queue depth information is provided by a traffic management unit.
4. The method of claim 1 , further comprising mapping an identifier for a particular queue associated with the queue depth information to a table entry that corresponds to the particular queue.
5. The method of claim 1 , wherein receiving queue depth information comprises:
during a first clock cycle of the network forwarding IC, receiving queue depth information relating to a first queue; and
during a second clock cycle of the network forwarding IC, receiving queue depth information relating to a second queue.
6. The method of claim 5 , wherein the queue depth information for the first queue is stored in a table during the second clock cycle.
7. The method of claim 1 further comprising:
assigning a first packet with a particular set of characteristics to a first queue before receiving the queue depth information; and
assigning a second packet with the particular set of characteristics to a second queue based on the queue depth information.
8. The method of claim 7 , wherein the queue depth information indicates that the first queue stores more packet data than the second queue.
9. The method of claim 7 , wherein the first and second queues correspond to different ports of a Link Aggregation Group (LAG).
10. The method of claim 7 , wherein the first and second queues correspond to different equal-cost routing paths.
11. The method of claim 1 , wherein the packet is a first packet, the method further comprising dropping a second packet based on the received queue depth information.
12. The method of claim 1 , wherein the queue depth information comprises buffer usage statistics.
13. A network forwarding integrated circuit (IC), wherein the network forwarding IC comprises:
circuitry to receive queue depth information at a non-final stage of a packet processing pipeline from a certain stage of the packet processing pipeline, the non-final stage being subsequent to the certain stage in the packet processing pipeline; and
at the non-final stage of the packet processing pipeline, additional circuitry to allocate a packet to a particular queue based on the received queue depth information;
wherein:
the certain stage comprises a match-action stage;
the queue depth information is to be stored, at least in part, in multiple copies of match-action stage table data stored in the match-action stage; and
the non-final stage is to write the queue depth information to at least one memory location identified by the certain stage.
14. The network forwarding IC of claim 13 , wherein the queue depth information comprises an amount of data stored in at least one queue.
15. The network forwarding IC of claim 14 , wherein the queue depth information is provided from a traffic management unit.
16. The network forwarding IC of claim 13 , wherein a first match-action stage is configured to store the queue depth information in a table and a second match-action stage is configured to assign the packet to the particular queue based on the received queue depth information.
17. The network forwarding IC of claim 16 , wherein the first match-action stage is configured to retrieve the stored queue depth information from the table and provide the queue depth information to the second match-action stage.
18. The network forwarding IC of claim 13 , comprising:
circuitry to receive queue depth information relating to a first queue during a first clock cycle of the network forwarding IC; and
circuitry to receive queue depth information relating to a second queue during a second clock cycle of the network forwarding IC.
19. The network forwarding IC of claim 18 , wherein the queue depth information for the first queue is stored in a table during the second clock cycle.
20. The network forwarding IC of claim 13 , wherein the packet is a first packet, wherein a set of match-action stages are configured to drop a second packet based on the queue depth information.