IP Library Granted Patent US 11,734,115
Granted Patent B2
US 11,734,115 · App. 17/135,404 · Granted Aug 22, 2023

Method and system for facilitating write latency reduction in a queue depth of one scenario

Inventor: Shu Li (Bothell, WA)
Assignee: Alibaba Group Holding Limited
G06F11/1076G06F11/3034G06F12/0238G06F12/0253G06F13/1673
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Quick Facts
Patent No.
US 11,734,115
App. No.
17/135,404
Granted
Aug 22, 2023
Kind
B2
Abstract

One embodiment provides a system which facilitates data management. During operation, the system processes, by a storage device, a write request and data associated with the write request, wherein the storage device comprises a plurality of channels over which to access a non-volatile memory of the storage device. The system writes the data to a first data buffer of the storage device while bypassing a first interface and a memory controller. The system sends the write request to the memory controller via the first interface. The system writes, via a first channel allocated for host write operations, the data from the first data buffer to the non-volatile memory. The system performs a garbage collection operation on the data, which comprises accessing the data via a second channel allocated for garbage collection operations.

Claims (81)

1. A computer-implemented method, comprising:

processing, by a storage device, a write request and data associated with the write request, wherein the storage device comprises a plurality of channels over which to access a non-volatile memory of the storage device;

writing the data to a first data buffer of the storage device while bypassing a first interface and a memory controller;

sending the write request to the memory controller via the first interface;

writing, via a first channel allocated for host write operations, the data from the first data buffer to the non-volatile memory; and

performing a garbage collection operation on the data, which comprises:

detecting a condition which triggers performing the garbage collection operation on the data;

accessing the data via a second channel allocated for garbage collection operations;

retrieving the data from the non-volatile memory; and

performing the garbage collection operation on the retrieved data while bypassing an error correction code (ECC)-encoding module.

2. The method of claim 1 , wherein performing the garbage collection operation on the retrieved data while bypassing an ECC-encoding module comprises:

performing an error correction code (ECC) decoding on the retrieved data;

storing the decoded data in a second data buffer which stores only data related to garbage collection operations; and

performing, by a first module which protects only data related to the garbage collection operations, a data-protecting operation on the decoded data.

3. The method of claim 2 ,

wherein the second data buffer and the first module comprise hardware or firmware associated with a controller of the storage device, and

wherein the first module is a redundant array of independent disks (RAID) encoding module.

4. The method of claim 1 ,

wherein the first interface is a Peripheral Component Interconnect Express (PCIe) interface, and

wherein the memory controller is a Non-Volatile Memory Express (NVMe) controller.

5. The method of claim 1 , further comprising:

dynamically allocating the plurality of channels as:

a first group of a first set of channels which comprise the first channel and channels allocated for only host write operations; and

a second group of a second set of channels which comprise the second channel and channels allocated for only garbage collection operations; and

responsive to detecting a first predetermined threshold, shifting the allocation of the channels between the first group and the second group.

6. The method of claim 5 , wherein shifting the allocation of the channels between the first group and the second group comprises:

allocating a different set of channels in the second group for only garbage collection operations, wherein the different set of channels is distinct from the second set of channels; and

allocating a remainder of the plurality of channels in the first group for only host write operations.

7. The method of claim 1 , wherein the write request and the data associated with the write request are processed in parallel or at a similar time by the storage device.

8. A computer system, comprising:

a processor; and

a memory coupled to the processor and storing instructions which, when executed by the processor, cause the processor to perform a method, the method comprising:

processing, by a storage device, a write request and data associated with the write request, wherein the storage device comprises a plurality of channels over which to access a non-volatile memory of the storage device;

writing the data to a first data buffer of the storage device while bypassing a first interface and a memory controller;

sending the write request to the memory controller via the first interface;

writing, via a first channel allocated for host write operations, the data from the first data buffer to the non-volatile memory; and

performing a garbage collection operation on the data, which comprises:

detecting a condition which triggers performing the garbage collection operation on the data;

accessing the data via a second channel allocated for garbage collection operations;

retrieving the data from the non-volatile memory; and

performing the garbage collection operation on the retrieved data while bypassing an error correction code (ECC)-encoding module.

9. The computer system of claim 8 , wherein performing the garbage collection operation on the retrieved data while bypassing an ECC-encoding module comprises:

performing an error correction code (ECC) decoding on the retrieved data;

storing the decoded data in a second data buffer which stores only data related to garbage collection operations; and

performing, by a first module which protects only data related to the garbage collection operations, a data-protecting operation on the decoded data.

10. The computer system of claim 9 ,

wherein the second data buffer and the first module comprise hardware or firmware associated with a controller of the storage device, and

wherein the first module is a redundant array of independent disks (RAID) encoding module.

11. The computer system of claim 8 ,

wherein the first interface is a Peripheral Component Interconnect Express (PCIe) interface, and

wherein the memory controller is a Non-Volatile Memory Express (NVMe) controller.

12. The computer system of claim 8 , wherein the method further comprises:

dynamically allocating the plurality of channels as:

a first group of a first set of channels which comprise the first channel and channels allocated for only host write operations; and

a second group of a second set of channels which comprise the second channel and channels allocated for only garbage collection operations; and

responsive to detecting a first predetermined threshold, shifting the allocation of the channels between the first group and the second group.

13. The computer system of claim 12 , wherein shifting the allocation of the channels between the first group and the second group comprises:

allocating a different set of channels in the second group for only garbage collection operations, wherein the different set of channels is distinct from the second set of channels; and

allocating a remainder of the plurality of channels in the first group for only host write operations.

14. The computer system of claim 9 , wherein the write request and the data associated with the write request are processed in parallel or at a similar time by the storage device.

15. A non-transitory computer-readable storage medium storing instructions that when executed by a computer cause the computer to perform a method, the method comprising:

processing, by a storage device, a write request and data associated with the write request, wherein the storage device comprises a plurality of channels over which to access a non-volatile memory of the storage device;

writing the data to a first data buffer of the storage device while bypassing a first interface and a memory controller;

sending the write request to the memory controller via the first interface;

writing, via a first channel allocated for host write operations, the data from the first data buffer to the non-volatile memory; and

performing a garbage collection operation on the data, which comprises:

detecting a condition which triggers performing the garbage collection operation on the data;

accessing the data via a second channel allocated for garbage collection operations;

retrieving the data from the non-volatile memory; and

performing the garbage collection operation on the retrieved data while bypassing an error correction code (ECC)-encoding module.

16. The storage medium of claim 15 , wherein performing the garbage collection operation on the retrieved data while bypassing an ECC-encoding module comprises:

performing an error correction code (ECC) decoding on the retrieved data;

storing the decoded data in a second data buffer which stores only data related to garbage collection operations; and

performing, by a first module which protects only data related to the garbage collection operations, a data-protecting operation on the decoded data.

17. The storage medium of claim 15 , wherein the method further comprises:

dynamically allocating the plurality of channels as:

a first group of a first set of channels which comprise the first channel and channels allocated for only host write operations; and

a second group of a second set of channels which comprise the second channel and channels allocated for only garbage collection operations; and

responsive to detecting a first predetermined threshold, shifting the allocation of the channels between the first group and the second group, which comprises:

allocating a different set of channels in the second group for only garbage collection operations, wherein the different set of channels is distinct from the second set of channels; and

allocating a remainder of the plurality of channels in the first group for only host write operations.

Assignments (2)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Apr 29, 2026
From: ALIBABA GROUP HOLDING LIMITED
To: CLOUD INTELLIGENCE ASSETS HOLDING (SINGAPORE) PRIVATE LIMITED
Reel/Frame 075499/0384 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Dec 29, 2020
From: LI, SHU
To: ALIBABA GROUP HOLDING LIMITED
Reel/Frame 054760/0835 →
Continuity (1)
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