Methods and devices for reducing array size and complexity in automata processors

1. A method, comprising:

encoding data to generate a second position encoded pattern;

transmitting the second position encoded pattern to an automata processor programmed with a first position encoded pattern; and

searching the second position encoded pattern via the automata processor programmed with the first position encoded pattern as a data pattern search.

2. The method of claim 1 , wherein searching the second position encoded pattern comprises using the programmed automata processor to search, in a sequential order, at least a portion of the second position encoded pattern for an encoded identifiable data pattern.

3. The method of claim 1 , comprising utilizing the programmed automata processor to identify a second data pattern as a mismatch between one or more data symbols in a sequential order of the second position encoded pattern and an encoded identifiable data pattern.

4. The method of claim 1 , comprising utilizing the programmed automata processor to identify a second data pattern as a substitution of one or more data symbols in a sequential order of the second position encoded pattern with respect to an encoded identifiable data pattern.

5. The method of claim 1 , comprising utilizing the programmed automata processor to identify a second data pattern as a deletion of one or more data symbols in a sequential order of the second position encoded pattern with respect to an encoded identifiable data pattern.

6. The method of claim 1 , comprising utilizing the programmed automata processor to identify a second data pattern as an insertion of one or more data symbols in a sequential order of the second position encoded pattern with respect to an encoded identifiable data pattern.

7. The method of claim 1 , comprising transmitting a result of the data pattern search as an indication of identifying an encoded identifiable data pattern within the second position encoded pattern to a host processor.

8. The method of claim 7 , comprising utilizing the host processor to encode the data to generate the second position encoded pattern.

9. A system, comprising:

a host processor that when in operation initiates transmission of position encoded data; and

an automata processor programmed with a position encoded pattern coupled to the host processor, wherein the automata processor programmed with the position encoded pattern when in operation receives the position encoded data and analyzes the position encoded data.

10. The system of claim 9 , wherein the automata processor when in operation searches, in a sequential order, at least a portion of the position encoded data for an encoded identifiable data pattern.

11. The system of claim 9 , wherein the automata processor when in operation identifies a second pattern as a mismatch between one or more data symbols in a sequential order of the position encoded data and an encoded identifiable data pattern.

12. The system of claim 9 , wherein the automata processor when in operation identifies a second pattern as a substitution of one or more data symbols in a sequential order of the position encoded data with respect to an encoded identifiable data pattern.

13. The system of claim 9 , wherein the automata processor when in operation identifies a second pattern as a deletion of one or more data symbols in a sequential order of the position encoded data with respect to an encoded identifiable data pattern.

14. The system of claim 9 , wherein the automata processor when in operation identifies a second pattern as an insertion of one or more data symbols in a sequential order of the position encoded data with respect to an encoded identifiable data pattern.

15. The system of claim 9 , comprising wherein the automata processor when in operation transmits a result as an indication of identifying an encoded identifiable data pattern within the position encoded data to the host processor.

16. The system of claim 9 , wherein the host processor when in operation encodes input data to generate the position encoded data.

17. A method, comprising:

generating a first position encoded pattern; and

loading the first position encoded pattern onto an automata processor to program the automata processor to identify an encoded identifiable data pattern within a received second position encoded pattern being analyzed by the automata processor.

18. The method of claim 17 , comprising encoding data to generate the first position encoded pattern based upon a position encoded code utilized to generate the first position encoded pattern.

19. The method of claim 17 , comprising determining a position value increase delay period to allow at least one state transition element (STE) of a plurality of STEs of the automata processor to identify particular data patterns.

20. The method of claim 19 , wherein determining the position value increase delay period comprises defining the position value increase delay period as a smallest integer not less than a product of a first length of the first position encoded pattern or a second length of the first position encoded pattern and a size of the first position encoded pattern divided by a data symbol capacity of one or more STEs of the plurality of STEs.