Conductive contact having barrier layers with different depths
A semiconductor device includes a transistor having a source/drain and a gate. The semiconductor device also includes a conductive contact for the transistor. The conductive contact provides electrical connectivity to the source/drain or the gate of the transistor. The conductive contact includes a plurality of barrier layers. The barrier layers have different depths from one another.
1. A semiconductor device, comprising:
a metal portion of a conductive contact;
a first barrier layer disposed on a side surface of the metal portion;
a second barrier layer disposed on a portion, but not all, of a side surface of the first barrier layer, wherein a top surface of the metal portion and a top surface of the first barrier layer is located higher than a top surface of the second barrier layer; and
a dielectric layer disposed below at least the second barrier layer, wherein at least the first barrier layer extends into, and is in direct contact with, the dielectric layer.
2. The semiconductor device of claim 1 , wherein the metal portion contains tungsten, cobalt, or combinations thereof.
3. The semiconductor device of claim 1 , wherein the first barrier layer and the second barrier layer have different material compositions.
4. The semiconductor device of claim 1 , wherein the first barrier layer is disposed on entirety of the side surface of the metal portion.
5. The semiconductor device of claim 1 , further comprising: a third barrier layer disposed on a portion, but not all, of a side surface of the second barrier layer.
6. The semiconductor device of claim 5 , wherein:
the first barrier layer contains cobalt, nickel, titanium, or titanium nitride;
the second barrier layer contains tantalum nitride, tantalum, titanium, or titanium nitride; and
the third barrier layer contain tantalum nitride.
7. The semiconductor device of claim 5 , further comprising: a fourth barrier layer disposed on a portion, but not all, of a side surface of the third barrier layer.
8. The semiconductor device of claim 1 , further comprising a silicide layer, wherein bottom surfaces of the metal portion and the first barrier layer are in direct contact with the silicide layer.
9. The semiconductor device of claim 8 , wherein the dielectric layer comprises an etching stop layer, and wherein the silicide layer and the first barrier layer collectively extend through the etching stop layer.
10. The semiconductor device of claim 1 , further comprising: a gate component of a transistor, wherein the metal portion, the first barrier layer, and the second barrier layer are disposed over, and electrically coupled to, the gate component.
11. The semiconductor device of claim 1 , further comprising: a source/drain component of a transistor, wherein the metal portion, the first barrier layer, and the second barrier layer are disposed over, and electrically coupled to, the source/drain component.
12. The semiconductor device of claim 1 , further comprising: a conductive via, wherein the metal portion, the first barrier layer, and the second barrier layer are disposed over, and electrically coupled to, the conductive via.
13. A semiconductor device, comprising:
a source/drain;
a gate;
a conductive via;
a silicide disposed over the source/drain, or over the gate, or over the conductive via; and
a conductive contact disposed over the silicide, the conductive contact including a metal core, a first barrier layer, and a second barrier layer, wherein:
bottom surfaces of the metal core and the first barrier layer, but not the second barrier layer, are in physical contact with the silicide; and
the first barrier layer is disposed between the metal core and the second barrier layer.
14. The semiconductor device of claim 13 , further comprising a third barrier layer, wherein:
the second barrier layer is disposed between the first barrier layer and the third barrier layer; and
the first barrier layer, the second barrier layer, and the third barrier layer have different material compositions.
15. The semiconductor device of claim 14 , wherein:
a bottom surface of the second barrier layer is more elevated than a bottom surface of the first barrier layer; and
a bottom surface of the third barrier layer is more elevated than a bottom surface of the second barrier layer.
16. The semiconductor device of claim 14 , further comprising a fourth barrier layer, wherein:
the third barrier layer is disposed between the second barrier layer and the fourth barrier layer; and
the fourth barrier layer has a more elevated bottom surface than the third barrier layer.
17. The semiconductor device of claim 13 , further comprising an etching stop layer that surrounds the silicide, wherein:
the etching stop layer is in direct contact with a portion of a side surface of the first barrier layer; and
the etching stop layer is in direct contact with a portion of a side surface of the second barrier layer and with a bottom surface of the second barrier layer.
18. A semiconductor device, comprising:
a first interlayer dielectric (ILD) disposed over a substrate;
a second ILD disposed over the first ILD; and
a conductive contact that extends vertically through the second ILD and at least partially through the first ILD, wherein the conductive contact includes a metal component, a first barrier layer disposed on a side surface of the metal component, a second barrier layer disposed on a side surface of the first barrier layer, and a third barrier layer disposed on a side surface of the second barrier layer;
wherein:
the first barrier layer is in physical contact with the first ILD but not with the second ILD;
the second barrier layer is in physical contact with both the first ILD and the second ILD; and
the third barrier layer is in physical contact with the second ILD but not with the first ILD.
19. The semiconductor device of claim 18 , further comprising a silicide layer, wherein:
bottom surfaces of the metal component and the first barrier layer are in direct contact with the silicide layer;
a bottom surface of the second barrier layer is in direct contact with the first ILD; and
a bottom surface of the third barrier layer is in direct contact with the second ILD.
20. The semiconductor device of claim 18 , wherein the first barrier layer, the second barrier layer, and the third barrier layer have different material compositions.