Three-dimensional memory device having multi-deck structure and methods for forming the same
Embodiments of structure and methods for forming a three-dimensional (3D) memory device are provided. In an example, a 3D memory device includes a substrate, an alternating layer stack on the substrate, and a barrier structure extending vertically through the alternating layer stack. The alternating layer stack includes (i) an alternating dielectric stack having a plurality of dielectric layer pairs enclosed laterally by at least the barrier structure, and (ii) an alternating conductor/dielectric stack having a plurality of conductor/dielectric layer pairs. The 3D memory device also includes a channel structure and a source structure each extending vertically through the alternating conductor/dielectric stack, and a contact structure extending vertically through the alternating dielectric stack. The source structure includes at least one staggered portion along a respective sidewall.
1. A three-dimensional (3D) memory device, comprising:
a substrate;
an alternating layer stack on the substrate;
a barrier structure extending vertically through the alternating layer stack, wherein the alternating layer stack comprises (i) an alternating dielectric stack comprising a plurality of dielectric layer pairs enclosed laterally by at least the barrier structure, and (ii) an alternating conductor/dielectric stack comprising a plurality of conductor/dielectric layer pairs;
a channel structure and a source structure each extending vertically through the alternating conductor/dielectric stack, wherein the source structure comprises at least one staggered portion along a respective sidewall; and
a contact structure extending vertically through the alternating dielectric stack.
2. The 3D memory device of claim 1 , wherein the contact structure comprises at least one staggered portion along a respective sidewall, the at least one staggered portion of the channel structure and the at least one staggered portion of the contact structure being at same vertical elevation.
3. The 3D memory device of claim 2 , wherein the barrier structure comprises silicon oxide, silicon nitride, or a combination thereof.
4. The 3D memory device of claim 1 , wherein each of the plurality of dielectric layer pairs comprises a silicon oxide layer and a silicon nitride layer, and each of the plurality of conductor/dielectric layer pairs comprises a metal layer and a silicon oxide layer.