IP Library Granted Patent US 12,001,329
Granted Patent B2
US 12,001,329 · App. 17/141,666 · Granted Jun 4, 2024

System and method for storage class memory tiering

Inventors: Parmeshwr Prasad (Bangalore, IN); Anusha Bhaskar (Bangalore, IN)
Assignee: Dell Products L.P.
G06F12/0238G06F9/5016G06F12/0882G06F12/1054G06F12/1063G06N20/00G06F2212/1021
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Quick Facts
Patent No.
US 12,001,329
App. No.
17/141,666
Granted
Jun 4, 2024
Kind
B2
Abstract

A memory device defines portions of the storage space as memory mode memory or storage mode memory. Memory mode memory is represented as a portion of a system physical address space of an information handling system, and storage mode memory is represented as a storage device in the information handling system. An operating system instantiates a paged virtual memory architecture on the information handling system. The information handling system determines a page miss rate for pages stored in the first portion of the storage space, receives a request to increase a first size of the first portion of storage space in response to determining the page miss rate, and increases the first size of the first portion of storage space to a second size in response to the request.

Claims (38)

1. An information handling system, comprising:

a non-volatile random access memory (NVRAM) device having a storage space and including a Label Storage Area (LSA) partition to store namespaces, each namespace defining an associated portion of the storage space as being one of a memory mode memory or a storage mode memory, wherein the LSA partition includes a first namespace defining a first portion of the storage space as a first memory mode memory having a first size, and a second namespace defining a second portion of the storage space as a first storage mode memory, wherein storage space of the NVRAM device that is defined as memory mode memory is represented as a portion of a system physical address space of the information handling system, and wherein storage space of the NVRAM device that is defined as storage mode memory is represented as a storage device in the information handling system; and

an operating system configured to instantiate a paged virtual memory architecture on the information handling system;

wherein the information handling system is configured to determine a page miss rate for pages stored in the first portion of the storage space, to receive a request to increase the first size of the first portion of storage space in order to increase the system physical address space of the information handling system in response to determining the page miss rate, and to increase the first size of the first portion of storage space to a second size in response to the request, wherein, in increasing the first size of the first portion to the second size, the information handling system is further configured to delete the LSA partition, to rewrite the second namespace to the LSA partition to define the second portion of the storage space as the first storage mode memory, and to write a third namespace to the LSA to define a third portion of the storage space as a second memory mode memory, the third portion including the first portion of the storage space and an additional portion of the storage space.

2. The information handling system of claim 1 , wherein the page miss rate includes a weighted average of page misses over time.

3. The information handling system of claim 1 , wherein the information handling system is further configured to determine that the page miss rate is greater than a threshold, and to provide the request in response to determining that the page miss rate is greater than the threshold.

4. The information handling system of claim 1 , wherein the information handling system is further configured to determine the second size of the first portion of storage space based upon a machine learning model.

5. The information handling system of claim 4 , wherein the machine learning model comprises an autoregressive integrated moving average model.

6. The information handling system of claim 5 , wherein the machine learning model further comprises a binary classifier.

7. The information handling system of claim 1 , wherein, in increasing the first size of the first portion of storage space to the second size, the information handling system is further configured to increase the first size by a predetermined amount of the storage space.

8. The information handling system of claim 7 , wherein the predetermined amount of the storage space is 64 megabytes.

9. A method, comprising:

providing, in an information handling system, a non-volatile random access memory (NVRAM) device having a storage space, and including a Label Storage Area (LSA) partition to store namespaces, each namespace defining an associated portion of the storage space as being one of a memory mode memory or a storage mode memory, wherein storage space of the NVRAM device that is defined as memory mode memory is represented as a portion of a system physical address space of the information handling system, and wherein storage space of the NVRAM device that is defined as storage mode memory is represented as a storage device in the information handling system;

defining, by a first namespace of the (LSA) partition, a first portion of storage space of the NVRAM device as a first memory mode memory having a first size;

defining, by a second namespace of the LSA partition, a first portion of the storage space as a first storage mode memory;

instantiating, on an operating system of the information handling system, a paged virtual memory architecture on the information handling system;

determining a page miss rate for pages stored in the first portion of the storage space;

receiving a request to increase the first size of the first portion of storage space in order to increase the system physical address space of the information handling system in response to determining the page miss rate; and

increasing the first size of the first portion of storage space to a second size in response to the request;

wherein, in increasing the first size of the first portion to the second size, the method further comprises:

deleting the LSA partition;

writing the second namespace to the LSA partition to define the second portion of the storage space as the first storage mode memory; and

writing a third namespace to the LSA to define a third portion of the storage space as a second memory mode memory having the second size, the third portion including the first portion of the storage space and an additional portion of the storage space.

10. The method of claim 9 , wherein the page miss rate includes a weighted average of page misses over time.

11. The method of claim 9 , further comprising:

determining that the page miss rate is greater than a threshold, wherein providing the request is in response to determining that the page miss rate is greater than the threshold.

12. The method of claim 9 , wherein the second size of the first portion is determined based upon a machine learning model.

13. The method of claim 12 , wherein the machine learning model comprises an autoregressive integrated moving average model, and a binary classifier.

14. The method of claim 9 , wherein, in increasing the first size of the first portion of storage space to the second size, the method further comprises:

increasing the first size by a predetermined amount of the storage space.

15. The method of claim 14 , wherein the predetermined amount of the storage space is 64 megabytes.

16. An information handling system, comprising:

a dynamic random access memory (DRAM) device;

a non-volatile random access memory (NVRAM) device having a storage space and including a Label Storage Area (LSA) partition to store namespaces, each namespace defining an associated portion of the storage space as being one of a memory mode memory or a storage mode memory, wherein the LSA partition includes configured to a first namespace defining a first portion of the storage space as a first memory mode memory having a first size, and a second namespace defining a second portion of the storage space as a first storage mode memory, wherein a sum of storage space of the DRAM device and the first portion of the storage space of the NVRAM device is represented as a system physical address space of the information handling system, and wherein storage space of the DRAM device that is defined as storage mode memory is represented as a storage device in the information handling system; and

an operating system configured to instantiate a paged virtual memory architecture on the information handling system;

wherein the information handling system is configured to determine a page miss rate for the system physical address space, and to increase the first size of the first portion of storage space of the NVRAM device to a second size in response to a request to increase a first size of the first portion of storage space in order to increase the system physical address space of the information handling system in response to determining the page miss rate, wherein in increasing the first size of the first portion to the second size, the information handling system is further configured to delete the LSA partition, to write the second namespace to the LSA partition to define the second portion of the storage space as the first storage mode memory, and to write a third namespace to the LSA partition to define a third portion of the storage space, as a second memory mode memory, the third portion including the first portion of the storage space and an additional portion of the storage space.

17. The information handling system of claim 16 , wherein, in increasing the first size of the first portion of storage space to the second size, the information handling system is further configured to increase the first size by a predetermined amount of the storage space.

18. The information handling system of claim 17 , wherein the predetermined amount of the storage space is 64 megabytes.

Assignments (9)
RELEASE OF SECURITY INTEREST IN PATENTS PREVIOUSLY RECORDED AT REEL/FRAME (055479/0342) Recorded Jun 10, 2022
From: THE BANK OF NEW YORK MELLON TRUST COMPANY, N.A., AS NOTES COLLATERAL AGENT
To: EMC IP HOLDING COMPANY LLC; DELL PRODUCTS L.P.
Reel/Frame 062021/0460 →
RELEASE OF SECURITY INTEREST IN PATENTS PREVIOUSLY RECORDED AT REEL/FRAME (055479/0051) Recorded Jun 10, 2022
From: THE BANK OF NEW YORK MELLON TRUST COMPANY, N.A., AS NOTES COLLATERAL AGENT
To: EMC IP HOLDING COMPANY LLC; DELL PRODUCTS L.P.
Reel/Frame 062021/0663 →
RELEASE OF SECURITY INTEREST IN PATENTS PREVIOUSLY RECORDED AT REEL/FRAME (056136/0752) Recorded Jun 10, 2022
From: THE BANK OF NEW YORK MELLON TRUST COMPANY, N.A., AS NOTES COLLATERAL AGENT
To: EMC IP HOLDING COMPANY LLC; DELL PRODUCTS L.P.
Reel/Frame 062021/0771 →
RELEASE OF SECURITY INTEREST AT REEL 055408 FRAME 0697 Recorded Nov 2, 2021
From: CREDIT SUISSE AG, CAYMAN ISLANDS BRANCH
To: DELL PRODUCTS L.P.; EMC IP HOLDING COMPANY LLC
Reel/Frame 058001/0553 →
SECURITY INTEREST Recorded Mar 3, 2021
From: EMC IP HOLDING COMPANY LLC; DELL PRODUCTS L.P.
To: THE BANK OF NEW YORK MELLON TRUST COMPANY, N.A., AS NOTES COLLATERAL AGENT
Reel/Frame 056136/0752 →
SECURITY INTEREST Recorded Mar 3, 2021
From: EMC IP HOLDING COMPANY LLC; DELL PRODUCTS L.P.
To: THE BANK OF NEW YORK MELLON TRUST COMPANY, N.A., AS NOTES COLLATERAL AGENT
Reel/Frame 055479/0051 →
SECURITY INTEREST Recorded Mar 3, 2021
From: EMC IP HOLDING COMPANY LLC; DELL PRODUCTS L.P.
To: THE BANK OF NEW YORK MELLON TRUST COMPANY, N.A., AS NOTES COLLATERAL AGENT
Reel/Frame 055479/0342 →
SECURITY AGREEMENT Recorded Feb 25, 2021
From: EMC IP HOLDING COMPANY LLC; DELL PRODUCTS L.P.
To: CREDIT SUISSE AG, CAYMAN ISLANDS BRANCH
Reel/Frame 055408/0697 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jan 5, 2021
From: PRASAD, PARMESHWR; BHASKAR, ANUSHA
To: DELL PRODUCTS, LP
Reel/Frame 054815/0482 →
Continuity (1)
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