IP Library Granted Patent US 11,249,935
Granted Patent B1
US 11,249,935 · App. 17/142,944 · Granted Feb 15, 2022

Single- and multi-channel, multi-latency payload bus

Inventors: Timothy M. Lambert (Austin, TX); Shawn J. Dube (Austin, TX)
Assignee: Dell Products L.P.
G06F13/4226G06F13/405G06F13/4031G06F13/382
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Quick Facts
Patent No.
US 11,249,935
App. No.
17/142,944
Granted
Feb 15, 2022
Kind
B1
Abstract

A system may include a first device and a second device communicatively coupled to the first device via a communications bus, wherein the communications bus comprises a single clock line for transmission of a clock signal from the first device to the second device, a single frame line for transmission of a frame alignment signal from the first device to the second device, and at least one communications channel for serialized communication of payloads of data between the first device and the second device, wherein the payloads of data have at least two different latencies.

Claims (83)

1. A system comprising:

a first device; and

a second device communicatively coupled to the first device via a communications bus, wherein the communications bus comprises:

a single clock line for transmission of a clock signal from the first device to the second device;

a single frame line for transmission of a frame alignment signal from the first device to the second device; and

a single communications channel for serialized communication of payloads of data between the first device and the second device, wherein the payloads of data have at least two different latencies; and

wherein the first device and the second device are configured to generate a plurality of frames for communication of the payloads of data onto the single communications channel, each frame comprising:

a first payload, the first payload having a first latency;

a portion of a second payload, the second payload having a second latency wherein the second latency is longer than the first latency; and

an index identifying a position of the portion of the second payload within the second payload.

2. The system of claim 1 , wherein each frame further comprises:

a portion of a third payload, the third payload having a third latency wherein the third latency is longer than the second latency; and

a second index identifying a position of the portion of the third payload within the third payload.

3. A system of comprising:

a first device; and

a second device communicatively coupled to the first device via a communications bus, wherein the communications bus comprises:

a single clock line for transmission of a clock signal from the first device to the second device;

a single frame line for transmission of a frame alignment signal from the first device to the second device; and

a plurality of communications channels, comprising at least a first communications channel and a second communications channel, for serialized communication of payloads of data between the first device and the second device, wherein the payloads of data have at least two different latencies; and

wherein the first device and the second device are configured to generate:

a plurality of first-latency frames for communication onto the first communications channel, each first-latency frame comprising a single first-latency packet of data having a first latency; and

a plurality of second-latency frames for communication onto the second communications channel, each second-latency frame comprising a plurality of second-latency packets of data having a second latency lower than the first latency;

wherein each first-latency frame and each second-latency frame is aligned to the frame signal.

4. The system of claim 3 , wherein a first bit-width of each first-latency packet is a multiple of a second bit-width of each second-latency packet.

5. The system of claim 3 , wherein:

the plurality of communications channels further comprises at least a third communications channel; and

the first device and the second device are configured to generate:

a plurality of third-latency frames for communication onto the third communications channel, each third-latency frame comprising a plurality of third-latency packets of data having a third latency lower than the second latency;

wherein each third-latency frame is aligned to the frame alignment signal.

6. A method comprising, in a system including a first device and a second device communicatively coupled to the first device via a communications bus, wherein the communications bus comprises a single clock line, a single frame line, and a single communications channel:

transmitting a clock signal on the single clock line from the first device to the second device;

transmitting a frame alignment signal on the single frame line from the first device to the second device;

performing serialized communication of payloads of data between the first device and the second device via the single communications channel, wherein the payloads of data have at least two different latencies; and

generating a plurality of frames for communication of the payloads of data onto the single communications channel, each frame comprising:

a first payload, the first payload having a first latency;

a portion of a second payload, the second payload having a second latency wherein the second latency is longer than the first latency; and

an index identifying a position of the portion of the second payload within the second payload.

7. The method of claim 6 , wherein each frame further comprises:

a portion of a third payload, the third payload having a third latency wherein the third latency is longer than the second latency; and

a second index identifying a position of the portion of the third payload within the third payload.

8. A method comprising, in a system including a first device and a second device communicatively coupled to the first device via a communications bus, wherein the communications bus comprises a single clock line, a single frame line, and a plurality of communications channels comprising at least a first communications channel and a second communications channel:

transmitting a clock signal on the single clock line from the first device to the second device;

transmitting a frame alignment signal on the single frame line from the first device to the second device; and

performing serialized communication of payloads of data between the first device and the second device via the plurality of communications channels, wherein the payloads of data have at least two different latencies; and

generating:

a plurality of first-latency frames for communication onto the first communications channel, each first-latency frame comprising a single first-latency packet of data having a first latency; and

a plurality of second-latency frames for communication onto the second communications channel, each second-latency frame comprising a plurality of second-latency packets of data having a second latency lower than the first latency;

wherein each first-latency frame and each second-latency frame is aligned to the frame signal.

9. The method of claim 8 , wherein a first bit-width of each first-latency packet is a multiple of a second bit-width of each second-latency packet.

10. The method of claim 8 , wherein:

the plurality of communications channels comprises at least a third communications channel; and

the method further comprises generating:

a plurality of third-latency frames for communication onto the third communications channel, each third-latency frame comprising a plurality of third-latency packets of data having a third latency lower than the second latency;

wherein each third-latency frame is aligned to the frame alignment signal.

11. An article of manufacture, comprising:

a non-transitory computer-readable medium; and

computer-executable instructions carried on the computer-readable medium, the instructions readable by a processing device, the instructions, when read and executed, for causing the processing device to, in a system including a first device and a second device communicatively coupled to the first device via a communications bus, wherein the communications bus comprises a single clock line, a single frame line, a single communications channel:

transmit a clock signal on the single clock line from the first device to the second device;

transmit a frame alignment signal on the single frame line from the first device to the second device; and

perform serialized communication of payloads of data between the first device and the second device via the at least one communications channel, wherein the payloads of data have at least two different latencies; and

generate a plurality of frames for communication of the payloads of data onto the single communications channel, each frame comprising:

a first payload, the first payload having a first latency;

a portion of a second payload, the second payload having a second latency wherein the second latency is longer than the first latency; and

an index identifying a position of the portion of the second payload within the second payload.

12. The article of claim 11 , wherein each frame further comprises:

a portion of a third payload, the third payload having a third latency wherein the third latency is longer than the second latency; and

a second index identifying a position of the portion of the third payload within the third payload.

13. An article of manufacture, comprising:

a non-transitory computer-readable medium; and

computer-executable instructions carried on the computer-readable medium, the instructions readable by a processing device, the instructions, when read and executed, for causing the processing device to, in a system including a first device and a second device communicatively coupled to the first device via a communications bus, wherein the communications bus comprises a single clock line, a single frame line, and a plurality of communications channels comprising at least a first communications channel and a second communications channel:

transmit a clock signal on the single clock line from the first device to the second device;

transmit a frame alignment signal on the single frame line from the first device to the second device;

perform serialized communication of payloads of data between the first device and the second device via the at least one communications channel, wherein the payloads of data have at least two different latencies; and

generate:

a plurality of first-latency frames for communication onto the first communications channel, each first-latency frame comprising a single first-latency packet of data having a first latency; and

a plurality of second-latency frames for communication onto the second communications channel, each second-latency frame comprising a plurality of second-latency packets of data having a second latency lower than the first latency;

wherein each first-latency frame and each second-latency frame is aligned to the frame signal.

14. The article of claim 13 , wherein a first bit-width of each first-latency packet is a multiple of a second bit-width of each second-latency packet.

15. The article of claim 13 , wherein:

the plurality of communications channels comprises at least a third communications channel; and

the instructions are for further causing the processing device to generate:

a plurality of third-latency frames for communication onto the third communications channel, each third-latency frame comprising a plurality of third-latency packets of data having a third latency lower than the second latency;

wherein each third-latency frame is aligned to the frame alignment signal.

Assignments (9)
RELEASE OF SECURITY INTEREST IN PATENTS PREVIOUSLY RECORDED AT REEL/FRAME (055479/0342) Recorded Jun 10, 2022
From: THE BANK OF NEW YORK MELLON TRUST COMPANY, N.A., AS NOTES COLLATERAL AGENT
To: EMC IP HOLDING COMPANY LLC; DELL PRODUCTS L.P.
Reel/Frame 062021/0460 →
RELEASE OF SECURITY INTEREST IN PATENTS PREVIOUSLY RECORDED AT REEL/FRAME (055479/0051) Recorded Jun 10, 2022
From: THE BANK OF NEW YORK MELLON TRUST COMPANY, N.A., AS NOTES COLLATERAL AGENT
To: EMC IP HOLDING COMPANY LLC; DELL PRODUCTS L.P.
Reel/Frame 062021/0663 →
RELEASE OF SECURITY INTEREST IN PATENTS PREVIOUSLY RECORDED AT REEL/FRAME (056136/0752) Recorded Jun 10, 2022
From: THE BANK OF NEW YORK MELLON TRUST COMPANY, N.A., AS NOTES COLLATERAL AGENT
To: EMC IP HOLDING COMPANY LLC; DELL PRODUCTS L.P.
Reel/Frame 062021/0771 →
RELEASE OF SECURITY INTEREST AT REEL 055408 FRAME 0697 Recorded Nov 2, 2021
From: CREDIT SUISSE AG, CAYMAN ISLANDS BRANCH
To: DELL PRODUCTS L.P.; EMC IP HOLDING COMPANY LLC
Reel/Frame 058001/0553 →
SECURITY INTEREST Recorded Mar 3, 2021
From: EMC IP HOLDING COMPANY LLC; DELL PRODUCTS L.P.
To: THE BANK OF NEW YORK MELLON TRUST COMPANY, N.A., AS NOTES COLLATERAL AGENT
Reel/Frame 056136/0752 →
SECURITY INTEREST Recorded Mar 3, 2021
From: EMC IP HOLDING COMPANY LLC; DELL PRODUCTS L.P.
To: THE BANK OF NEW YORK MELLON TRUST COMPANY, N.A., AS NOTES COLLATERAL AGENT
Reel/Frame 055479/0051 →
SECURITY INTEREST Recorded Mar 3, 2021
From: EMC IP HOLDING COMPANY LLC; DELL PRODUCTS L.P.
To: THE BANK OF NEW YORK MELLON TRUST COMPANY, N.A., AS NOTES COLLATERAL AGENT
Reel/Frame 055479/0342 →
SECURITY AGREEMENT Recorded Feb 25, 2021
From: EMC IP HOLDING COMPANY LLC; DELL PRODUCTS L.P.
To: CREDIT SUISSE AG, CAYMAN ISLANDS BRANCH
Reel/Frame 055408/0697 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jan 6, 2021
From: LAMBERT, TIMOTHY M.; DUBE, SHAWN J.
To: DELL PRODUCTS L.P.
Reel/Frame 054832/0613 →