IP Library Granted Patent US 11,494,541
Granted Patent B2
US 11,494,541 · App. 17/149,110 · Granted Nov 8, 2022

Pin sharing for photonic processors

Inventors: Carl Ramey (Westborough, MA); Darius Bunandar (Boston, MA); Nicholas C. Harris (Boston, MA)
Assignee: Lightmatter, Inc.
G06F30/373G06F9/3877G06F30/327H04B10/524G02B6/12G02B6/12004G02B6/12021G02B6/42G02F1/0344G02F7/00H01L31/14
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Quick Facts
Patent No.
US 11,494,541
App. No.
17/149,110
Granted
Nov 8, 2022
Kind
B2
Abstract

Aspects relate to a photonic processing system, an integrated circuit, and a method of operating an integrated circuit to control components to modulate optical signals. A photonic processing system, comprising: a photonic integrated circuit comprising: a first electrically-controllable photonic component electrically coupling an input pin to a first output pin; and a second electrically-controllable photonic component electrically coupling the input pin to a second output pin.

Claims (40)

1. A photonic processing system, comprising:

a photonic integrated circuit comprising:

a first electrically-controllable photonic component electrically coupling an input pin to a first output pin; and

a second electrically-controllable photonic component electrically coupling the input pin to a second output pin, and

an electronic integrated circuit comprising:

a driver electrically coupled to the input pin;

a first switch electrically coupled to the first output pin; and

a second switch electrically coupled to the second output pin.

2. The photonic processing system of claim 1 , wherein the driver comprises a digital-to-analog converter (DAC).

3. The photonic processing system of claim 1 , wherein the first switch and the second switch are electrically coupled to a common reference voltage terminal.

4. The photonic processing system of claim 3 , wherein the reference voltage terminal is further coupled to the driver.

5. The photonic processing system of claim 1 , wherein the electronic integrated circuit and the photonic integrated circuit are vertically stacked.

6. The photonic processing system of claim 1 , wherein the electronic integrated circuit and the photonic integrated circuit are disposed on a common substrate.

7. The photonic processing system of claim 1 , wherein the electronic integrated circuit and the photonic integrated circuit are disposed on an interposer.

8. The photonic processing system of claim 1 , wherein the input pin is a first input pin and wherein the photonic integrated circuit further comprises a plurality of input pins and a plurality of output pins, wherein the plurality of output pins comprises the first output pin and the second output pin and the plurality of input pins comprises the first input pin.

9. The photonic processing system of claim 8 , wherein the photonic integrated circuit further comprises a third electrically-controllable photonic component electrically coupling a second input pin of the plurality of input pins to the first output pin.

10. The photonic processing system of claim 9 , wherein the photonic integrated circuit further comprises a fourth electrically-controllable photonic component electrically coupling the second input pin to the second output pin.

11. The photonic processing system of claim 8 , wherein the plurality of input pins comprises between 8 and 1024 input pins, and wherein the plurality of output pins comprises between 8 and 1024 output pins.

12. The photonic processing system of claim 8 , wherein the photonic integrated circuit comprises between 64 and 140,000 photonic components.

13. The photonic processing system of claim 1 , wherein the first electrically-controllable photonic component comprises an optical modulator.

14. The photonic processing system of claim 13 , wherein the optical modulator comprises a Mach-Zehnder interferometer.

15. The photonic processing system of claim 13 , wherein the optical modulator comprises a ring modulator.

16. A photonic processing system, comprising:

a photonic integrated circuit comprising:

a first input pin and a first output pin; and

a first electrically-controllable photonic component electrically coupling the first input pin to the first output pin; and

an electronic integrated circuit comprising:

a first driver electrically coupled to the first input pin; and

a first switch electrically coupled to the first output pin.

17. The photonic processing system of claim 16 , wherein the photonic integrated circuit further comprises a second output pin and a second electrically-controllable photonic component electrically coupling the first input pin to the second output pin, and wherein the electronic integrated circuit further comprises a second switch electrically coupled to the second output pin.

18. The photonic processing system of claim 17 , wherein the photonic integrated circuit further comprises a second input pin and a third electrically-controllable photonic component electrically coupling the second input pin to the first output pin, and wherein the electronic integrated circuit further comprises a second driver electrically coupled to the second input pin.

19. The photonic processing system of claim 18 , wherein the photonic integrated circuit further comprises a fourth electrically-controllable photonic component electrically coupling the second input pin to the second output pin.

20. The photonic processing system of claim 16 , wherein the first driver comprises a digital-to-analog converter (DAC).

21. The photonic processing system of claim 16 , wherein the photonic integrated circuit comprises a silicon photonics integrated circuit.

22. The photonic processing system of claim 16 , wherein the photonic integrated circuit comprises between 8 and 1024 input pins, and between 8 and 1024 output pins.

23. The photonic processing system of claim 16 , wherein the photonic integrated circuit comprises between 64 and 140,000 photonic components.

24. The photonic processing system of claim 16 , wherein the first electrically-controllable photonic component comprises an optical modulator.

25. The photonic processing system of claim 16 , wherein the electronic integrated circuit and the photonic integrated circuit are vertically stacked.

26. The photonic processing system of claim 16 , wherein the electronic integrated circuit and the photonic integrated circuit are disposed on a common substrate.

27. The photonic processing system of claim 16 , wherein the electronic integrated circuit and the photonic integrated circuit are disposed on an interposer.

Assignments (4)
TERMINATION OF IP SECURITY AGREEMENT Recorded Nov 5, 2024
From: EASTWARD FUND MANAGEMENT, LLC
To: LIGHTMATTER, INC.
Reel/Frame 069304/0700 →
RELEASE OF SECURITY INTEREST Recorded Mar 31, 2023
From: EASTWARD FUND MANAGEMENT, LLC
To: LIGHTMATTER, INC.
Reel/Frame 063209/0966 →
SECURITY INTEREST Recorded Dec 27, 2022
From: LIGHTMATTER, INC.
To: EASTWARD FUND MANAGEMENT, LLC
Reel/Frame 062230/0361 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Mar 17, 2021
From: RAMEY, CARL; BUNANDAR, DARIUS; HARRIS, NICHOLAS C.
To: LIGHTMATTER, INC.
Reel/Frame 055624/0950 →
Continuity (2)
Provisional Application 62961975 · Jan 16, 2020
Related Publication 20210224454A1 · Jul 22, 2021