IP Library Granted Patent US 11,545,944
Granted Patent B2
US 11,545,944 · App. 17/151,922 · Granted Jan 3, 2023

Power amplifier circuit

Inventors: Jun Enomoto (Kyoto, JP); Kazuo Watanabe (Kyoto, JP); Satoshi Tanaka (Kyoto, JP); Yusuke Tanaka (Kyoto, JP); Makoto Ito (Kyoto, JP)
Assignee: MURATA MANUFACTURING CO., LTD.
H03F3/245H03F1/565H03F3/195H03F2200/102H03F2200/451
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Quick Facts
Patent No.
US 11,545,944
App. No.
17/151,922
Granted
Jan 3, 2023
Kind
B2
Abstract

A power amplifier circuit includes a power amplifier including a first transistor having a first terminal connected to a reference potential, a second terminal to which a first current and a radio-frequency signal are input, and a third terminal connected to a first power supply potential via a first inductor; a capacitor connected to the third terminal of the first transistor; a second transistor including a first terminal connected to the capacitor and the reference potential via a second inductor, a second terminal to which a second current is input and is connected to the reference potential, and a third terminal connected to the first power supply potential via a third inductor and outputs signal; and an adjustment circuit that outputs a third current corresponding to the first power supply potential or a second power supply potential to the second terminal of the second transistor.

Claims (22)

1. A power amplifier circuit comprising:

a first bias circuit configured to output a first current;

a second bias circuit configured to output a second current;

a power amplifier comprising:

a first transistor having a first terminal electrically connected to a reference potential, a second terminal to which the first current is input via a first resistor and to which a radio-frequency signal is input via a first direct-current cut capacitor, and a third terminal electrically connected to a first power supply potential that changes in accordance with an envelope of the radio-frequency signal via a first inductor,

a capacitor having a first end electrically connected to the third terminal of the first transistor, and a second end, and

a second transistor having a first terminal electrically connected to the second end of the capacitor and electrically connected to the reference potential via a second inductor, a second terminal to which the second current is input via a second resistor and which is electrically connected to the reference potential via a second direct-current cut capacitor, and a third terminal electrically connected to the first power supply potential via a third inductor, the second transistor being configured to output a radio-frequency output signal from the third terminal of the second transistor, the radio-frequency output signal being obtained by amplifying the radio-frequency signal; and

an adjustment circuit configured to output a third current corresponding to the first power supply potential or corresponding to a second power supply potential that changes in accordance with the envelope, to the second terminal of the second transistor via the second resistor.

2. The power amplifier circuit according to claim 1 , wherein the adjustment circuit comprises:

a third transistor having a first terminal, a second terminal to which a constant potential is input via a third resistor, and a third terminal electrically connected to the first power supply potential or the second power supply potential via a fourth resistor, the third transistor being configured to output the third current from the first terminal of the third transistor.

3. The power amplifier circuit according to claim 2 , further comprising a second power amplifier,

wherein the second power amplifier comprises a fourth transistor having a first terminal electrically connected to the reference potential, a second terminal to which a radio-frequency input signal is input, and a third terminal electrically connected to the second power supply potential via a fourth inductor, the fourth transistor being configured to output the radio-frequency signal from the third terminal of the fourth transistor, the radio-frequency signal being obtained by amplifying the radio-frequency input signal, and

wherein the third terminal of the third transistor is electrically connected to a node between the third terminal of the fourth transistor and the fourth inductor via the fourth resistor.

4. The power amplifier circuit according to claim 2 , wherein the third terminal of the third transistor is electrically connected to a node between the third terminal of the first transistor and the first inductor via the fourth resistor.

5. The power amplifier circuit according to claim 2 , wherein the adjustment circuit further comprises:

a second capacitor having a first end electrically connected to the third terminal of the third transistor, and a second end electrically connected to the second terminal of the third transistor.

6. The power amplifier circuit according to claim 5 , wherein the adjustment circuit further comprises:

a third capacitor electrically connected in parallel to the fourth resistor, and

a fifth resistor electrically connected between the first power supply potential or the second power supply potential, and the fourth resistor.

7. The power amplifier circuit according to claim 5 , wherein the adjustment circuit further comprises:

a fifth resistor electrically connected between the first power supply potential or the second power supply potential, and the fourth resistor, and

a third capacitor having a first end electrically connected to a node between the fourth resistor and the fifth resistor, and a second end electrically connected to the first terminal of the third transistor.

Assignments (1)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jan 19, 2021
From: ENOMOTO, JUN; WATANABE, KAZUO; TANAKA, SATOSHI; TANAKA, YUSUKE; ITO, MAKOTO
To: MURATA MANUFACTURING CO., LTD.
Reel/Frame 054952/0519 →
Priority Claims (1)
JP JP2020-007684 · Jan 21, 2020 · national
Continuity (1)
Related Publication 20210226595A1 · Jul 22, 2021