IP Library Granted Patent US 11,836,028
Granted Patent B2
US 11,836,028 · App. 17/153,583 · Granted Dec 5, 2023

System and method for closed-loop memory power capping

Inventors: Hasnain Shabbir (Round Rock, TX); Carlos Henry (Round Rock, TX)
Assignee: Dell Products L.P.
G06F1/3225G06F1/206G06F11/3037G06F11/3062
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Quick Facts
Patent No.
US 11,836,028
App. No.
17/153,583
Granted
Dec 5, 2023
Kind
B2
Abstract

An information handling system includes a management controller configured to determine whether to initiate control of power consumption of a memory subsystem of the information handling system. A closed-loop memory thermal controller may receive temperature values to determine a temperature setpoint for the memory subsystem, and calculate an error value that is a difference between the temperature setpoint and a temperature measurement. If the error value is within a temperature margin, then the thermal controller may determine a proportional-integral power signal based on the temperature margin and the temperature measurement; and determine a proportional-integral gain based on a maximum rate of change of the temperature measurement between polling events of the temperature measurement and a polling rate of the temperature measurement. The thermal controller may also determine a modified proportional-integral power signal based on the proportional-integral gain, wherein the modified proportional-integral power signal is used to determine a power adjustment value of the memory subsystem; and in response to an initiation from the management controller to control the power consumption of the memory subsystem, control the power consumption of the memory subsystem based on the power adjustment value.

Claims (44)

1. A method comprising:

receiving, by a processor, temperature values to determine a temperature setpoint for a memory subsystem based on a memory temperature limit less a product of temperature margin and difference between the memory temperature limit and a memory temperature target;

receiving a temperature measurement from a temperature sensor associated with the memory subsystem;

calculating an error value that is a difference between the temperature setpoint and the temperature measurement;

determining whether the error value is within a temperature margin;

in response to determining that the error value is within the temperature margin, triggering power capping for the memory subsystem and disabling a proportional-differential controller, wherein the power capping includes determining a proportional-integral power signal based on the terror value;

determining a proportional-integral gain based on a maximum rate of change of the temperature measurement between polling events of the temperature measurement and a polling rate of the temperature measurement;

determining a modified proportional-integral power signal by factoring the proportional-integral gain into the proportional-integral power signal, wherein the modified proportional-integral power signal is used to determine a power adjustment value of the memory subsystem; and

capping power consumption of the memory subsystem to a power limit, wherein the power limit is decreased as the temperature margin is reduced.

2. The method of claim 1 , receiving a signal from a management controller to initiate the capping of the power consumption of the memory subsystem.

3. The method of claim 1 , wherein the determining of the proportional-integral power signal is performed based on a set of rules.

4. The method of claim 1 , wherein the temperature margin is relative to a temperature critical limit.

5. The method of claim 1 , wherein the determining the modified proportional-integral power signal is based on a comparison between a steady-state value and a steady-state threshold value.

6. The method of claim 5 , further comprising determining if the steady-state value is greater than or equal to the steady-state threshold value then not including the proportional-integral power signal as an input in determining the modified proportional-integral power signal.

7. The method of claim 5 , further comprising if the steady-state value is less than the steady-state threshold value, then including the proportional-integral power signal as input in determining the modified proportional-integral power signal.

8. The method of claim 5 , further comprising if the steady-state value is greater than or equal to the steady-state threshold value then enabling the proportional-differential controller.

9. The method of claim 5 , further comprising if the steady-state value is greater than or equal to the steady-state threshold value then disabling proportional-integral controller.

10. The method of claim 1 , wherein the determining whether to cap the power consumption of the memory subsystem is performed after capping, by a thermal controller, power consumption of a central processing unit.

11. An information handling system, comprising:

a management controller configured to determine whether to initiate cap of power consumption of a memory subsystem of the information handling system; and

a closed-loop memory thermal controller configured to:

receive temperature values to determine a temperature setpoint for the memory subsystem based on a memory temperature limit less a product of temperature margin and difference between the memory temperature limit and a memory temperature target;

receive a temperature measurement from a temperature sensor associated with the memory subsystem;

calculate an error value that is a difference between the temperature setpoint and the temperature measurement;

if the error value is within a temperature margin, then trigger power capping for the memory subsystem and disable a proportional-differential controller, wherein the power capping includes to determine a proportional-integral power signal based on the error value;

determine a proportional-integral gain based on a maximum rate of change of the temperature measurement between polling events of the temperature measurement and a polling rate of the temperature measurement;

determine a modified proportional-integral power signal by factoring the proportional-integral gain into the proportional-integral power signal, wherein the modified proportional-integral power signal is used to determine a power adjustment value of the memory subsystem; and

cap the power consumption of the memory subsystem to a power limit, wherein the power limit is decreased as the temperature margin is reduced.

12. The information handling system of claim 11 , wherein a signal is transmitted by the management controller to initiate the capping of the power consumption of the memory subsystem.

13. The information handling system of claim 11 , wherein the determination of the proportional-integral power signal is performed based on a set of rules.

14. The information handling system of claim 11 , wherein the closed-loop memory thermal controller is further configured to determine if a steady-state value is greater than or equal to a steady-state threshold value then not including the proportional-integral power signal as an input in determining the modified proportional-integral power signal.

15. The information handling system of claim 11 , wherein the closed-loop memory thermal controller is further configured to disable the proportional-differential controller associated with the closed-loop memory thermal controller.

16. A non-transitory computer-readable medium including code that when executed performs a method, the method comprising:

receiving temperature values to determine a temperature setpoint for a memory subsystem based on a memory temperature limit less a product of temperature margin and difference between the memory temperature limit and a memory temperature target;

receiving a temperature measurement from a temperature sensor associated with the memory subsystem;

calculating an error value which is a difference between the temperature setpoint and the temperature measurement;

if the error value is within a temperature margin, then triggering power capping for the memory subsystem and disabling a proportional differential controller, wherein the power capping includes determining a proportional-integral power signal based on the error value;

determining a proportional-integral gain based on a maximum rate of change of the temperature measurement between polling events of the temperature measurement and a polling rate of the temperature measurement;

determining a modified proportional-integral power signal by factoring the proportional-integral gain into the proportional-integral power signal, wherein the modified proportional-integral power signal is used to determine a power adjustment value of the memory subsystem; and

capping power consumption of the memory subsystem to a power limit, wherein the power limit is decreased as the temperature margin is reduced.

17. The non-transitory computer-readable medium of claim 16 , wherein the method further comprising receiving a signal from a management controller to initiate the capping of the power consumption of the memory subsystem.

18. The non-transitory computer-readable medium of claim 16 , wherein the determining whether to cap the power consumption of the memory subsystem is performed subsequent to capping, by a thermal controller, power consumption of a central processing unit.

19. The non-transitory computer-readable medium of claim 16 , wherein the determining of the proportional-integral power signal is performed based on a set of rules.

20. The non-transitory computer-readable medium of claim 16 , wherein the determining the modified proportional-integral power signal is based on a comparison between a steady-state value and a steady-state threshold value.

Assignments (9)
RELEASE OF SECURITY INTEREST IN PATENTS PREVIOUSLY RECORDED AT REEL/FRAME (055479/0342) Recorded Jun 10, 2022
From: THE BANK OF NEW YORK MELLON TRUST COMPANY, N.A., AS NOTES COLLATERAL AGENT
To: EMC IP HOLDING COMPANY LLC; DELL PRODUCTS L.P.
Reel/Frame 062021/0460 →
RELEASE OF SECURITY INTEREST IN PATENTS PREVIOUSLY RECORDED AT REEL/FRAME (055479/0051) Recorded Jun 10, 2022
From: THE BANK OF NEW YORK MELLON TRUST COMPANY, N.A., AS NOTES COLLATERAL AGENT
To: EMC IP HOLDING COMPANY LLC; DELL PRODUCTS L.P.
Reel/Frame 062021/0663 →
RELEASE OF SECURITY INTEREST IN PATENTS PREVIOUSLY RECORDED AT REEL/FRAME (056136/0752) Recorded Jun 10, 2022
From: THE BANK OF NEW YORK MELLON TRUST COMPANY, N.A., AS NOTES COLLATERAL AGENT
To: EMC IP HOLDING COMPANY LLC; DELL PRODUCTS L.P.
Reel/Frame 062021/0771 →
RELEASE OF SECURITY INTEREST AT REEL 055408 FRAME 0697 Recorded Nov 2, 2021
From: CREDIT SUISSE AG, CAYMAN ISLANDS BRANCH
To: DELL PRODUCTS L.P.; EMC IP HOLDING COMPANY LLC
Reel/Frame 058001/0553 →
SECURITY INTEREST Recorded Mar 3, 2021
From: EMC IP HOLDING COMPANY LLC; DELL PRODUCTS L.P.
To: THE BANK OF NEW YORK MELLON TRUST COMPANY, N.A., AS NOTES COLLATERAL AGENT
Reel/Frame 056136/0752 →
SECURITY INTEREST Recorded Mar 3, 2021
From: EMC IP HOLDING COMPANY LLC; DELL PRODUCTS L.P.
To: THE BANK OF NEW YORK MELLON TRUST COMPANY, N.A., AS NOTES COLLATERAL AGENT
Reel/Frame 055479/0051 →
SECURITY INTEREST Recorded Mar 3, 2021
From: EMC IP HOLDING COMPANY LLC; DELL PRODUCTS L.P.
To: THE BANK OF NEW YORK MELLON TRUST COMPANY, N.A., AS NOTES COLLATERAL AGENT
Reel/Frame 055479/0342 →
SECURITY AGREEMENT Recorded Feb 25, 2021
From: EMC IP HOLDING COMPANY LLC; DELL PRODUCTS L.P.
To: CREDIT SUISSE AG, CAYMAN ISLANDS BRANCH
Reel/Frame 055408/0697 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jan 20, 2021
From: SHABBIR, HASNAIN; HENRY, CARLOS
To: DELL PRODUCTS, LP
Reel/Frame 054971/0058 →