IP Library Granted Patent US 11,409,686
Granted Patent B1
US 11,409,686 · App. 17/154,836 · Granted Aug 9, 2022

Systems and methods for floating paddle card enablement

Inventors: Timothy M. Lambert (Austin, TX); Jeffrey L. Kennedy (Austin, TX); Nihit S. Bhavsar (Round Rock, TX)
Assignee: Dell Products L.P.
G06F13/405G06F1/12G06F1/26G06F1/266G06F11/1417G06F13/102G06F13/12G06F13/409G06F2201/805
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Quick Facts
Patent No.
US 11,409,686
App. No.
17/154,836
Granted
Aug 9, 2022
Kind
B1
Abstract

An information handling system may include a motherboard and a floating paddle card. The motherboard may include a host system comprising a host system processor, a logic device configured to perform a functionality of the information handling system in accordance with code stored on non-transitory computer-readable media of the logic device, and a management controller communicatively coupled to the host system processor and the logic device and configured to perform out-of-band management of the information handling system. The floating paddle card may be communicatively coupled to the motherboard and configured to serve as interface between one or more devices coupled to the floating paddle card and the logic device and the management controller, the floating paddle card comprising a microcontroller unit configured to, alone or in combination with other circuitry of the floating paddle card, divide management of the one or more devices between the motherboard and the floating paddle card.

Claims (30)

1. An information handling system comprising:

a motherboard comprising:

a host system comprising a host system processor;

a logic device configured to perform a functionality of the information handling system in accordance with code stored on non-transitory computer-readable media of the logic device; and

a management controller communicatively coupled to the host system processor and the logic device and configured to perform out-of-band management of the information handling system; and

a floating paddle card communicatively coupled to the motherboard and configured to serve as interface between one or more devices coupled to the floating paddle card and the logic device and the management controller, the floating paddle card comprising a microcontroller unit configured to, alone or in combination with other circuitry of the floating paddle card, divide management of the one or more devices between the motherboard and the floating paddle card.

2. The information handling system of claim 1 , wherein division of management of the one or more devices between the motherboard and the floating paddle card comprises jointly controlling fundamental reset of the one or more devices by the motherboard and the floating paddle card.

3. The information handling system of claim 1 , wherein division of management of the one or more devices between the motherboard and the floating paddle card comprises jointly controlling a clock synchronization signal delivered to the one or more devices by the motherboard and the floating paddle card.

4. The information handling system of claim 1 , wherein division of management of the one or more devices between the motherboard and the floating paddle card comprises the floating paddle card staggering the powering on of the one or more devices.

5. The information handling system of claim 1 , wherein division of management of the one or more devices between the motherboard and the floating paddle card comprises the floating paddle card controlling power rails for the one or more devices over a plurality of operational modes of the one or more devices.

6. The information handling system of claim 1 , wherein the division of management of the one or more devices between the motherboard and the floating paddle card comprises the floating paddle card performing power source discovery.

7. The information handling system of claim 1 , wherein the division of management of the one or more devices between the motherboard and the floating paddle card comprises the floating paddle card selectively enabling the one or more devices based on a thermal configuration of the information handling system.

8. The information handling system of claim 1 , wherein the division of management of the one or more devices between the motherboard and the floating paddle card comprises the floating paddle card performing startup fault handling of the one or more devices.

9. The information handling system of claim 1 , wherein the division of management of the one or more devices between the motherboard and the floating paddle card comprises the floating paddle card performing runtime fault handling of the one or more devices.

10. The information handling system of claim 1 , further comprising a mezzanine card interfaced between the one or more devices and the floating paddle card.

11. A method comprising, in an information handling system comprising a motherboard having a host system comprising a host system processor, a logic device configured to perform a functionality of the information handling system in accordance with code stored on non-transitory computer-readable media of the logic device, and a management controller communicatively coupled to the host system processor and the logic device and configured to perform out-of-band management of the information handling system:

dividing, between the motherboard and a floating paddle card communicatively coupled to the motherboard and configured to serve as interface between one or more devices coupled to the floating paddle card and the logic device and the management controller, management of the one or more devices between the motherboard and the floating paddle card.

12. The method of claim 11 , wherein division of management of the one or more devices between the motherboard and the floating paddle card comprises jointly controlling fundamental reset of the one or more devices by the motherboard and the floating paddle card.

13. The method of claim 11 , wherein division of management of the one or more devices between the motherboard and the floating paddle card comprises jointly controlling a clock synchronization signal delivered to the one or more devices by the motherboard and the floating paddle card.

14. The method of claim 11 , wherein division of management of the one or more devices between the motherboard and the floating paddle card comprises the floating paddle card staggering the powering on of the one or more devices.

15. The method of claim 11 , wherein division of management of the one or more devices between the motherboard and the floating paddle card comprises the floating paddle card controlling power rails for the one or more devices over a plurality of operational modes of the one or more devices.

16. The method of claim 11 , wherein the division of management of the one or more devices between the motherboard and the floating paddle card comprises the floating paddle card performing power source discovery.

17. The method of claim 11 , wherein the division of management of the one or more devices between the motherboard and the floating paddle card comprises the floating paddle card selectively enabling the one or more devices based on a thermal configuration of the information handling system.

18. The method of claim 11 , wherein the division of management of the one or more devices between the motherboard and the floating paddle card comprises the floating paddle card performing startup fault handling of the one or more devices.

19. The method of claim 11 , wherein the division of management of the one or more devices between the motherboard and the floating paddle card comprises the floating paddle card performing runtime fault handling of the one or more devices.

20. The method of claim 11 , wherein a mezzanine card is interfaced between the one or more devices and the floating paddle card.

21. An article of manufacture comprising:

a non-transitory computer-readable medium; and

computer-executable instructions carried on the computer-readable medium, the instructions readable by a processing device, the instructions, when read and executed, for causing the processing device to, in an information handling system comprising a motherboard having a host system comprising a host system processor, a logic device configured to perform a functionality of the information handling system in accordance with code stored on non-transitory computer-readable media of the logic device, and a management controller communicatively coupled to the host system processor and the logic device and configured to perform out-of-band management of the information handling system:

divide, between the motherboard and a floating paddle card communicatively coupled to the motherboard and configured to serve as interface between one or more devices coupled to the floating paddle card and the logic device and the management controller, management of the one or more devices between the motherboard and the floating paddle card.

Assignments (9)
RELEASE OF SECURITY INTEREST IN PATENTS PREVIOUSLY RECORDED AT REEL/FRAME (055479/0342) Recorded Jun 10, 2022
From: THE BANK OF NEW YORK MELLON TRUST COMPANY, N.A., AS NOTES COLLATERAL AGENT
To: EMC IP HOLDING COMPANY LLC; DELL PRODUCTS L.P.
Reel/Frame 062021/0460 →
RELEASE OF SECURITY INTEREST IN PATENTS PREVIOUSLY RECORDED AT REEL/FRAME (055479/0051) Recorded Jun 10, 2022
From: THE BANK OF NEW YORK MELLON TRUST COMPANY, N.A., AS NOTES COLLATERAL AGENT
To: EMC IP HOLDING COMPANY LLC; DELL PRODUCTS L.P.
Reel/Frame 062021/0663 →
RELEASE OF SECURITY INTEREST IN PATENTS PREVIOUSLY RECORDED AT REEL/FRAME (056136/0752) Recorded Jun 10, 2022
From: THE BANK OF NEW YORK MELLON TRUST COMPANY, N.A., AS NOTES COLLATERAL AGENT
To: EMC IP HOLDING COMPANY LLC; DELL PRODUCTS L.P.
Reel/Frame 062021/0771 →
RELEASE OF SECURITY INTEREST AT REEL 055408 FRAME 0697 Recorded Nov 2, 2021
From: CREDIT SUISSE AG, CAYMAN ISLANDS BRANCH
To: DELL PRODUCTS L.P.; EMC IP HOLDING COMPANY LLC
Reel/Frame 058001/0553 →
SECURITY INTEREST Recorded Mar 3, 2021
From: EMC IP HOLDING COMPANY LLC; DELL PRODUCTS L.P.
To: THE BANK OF NEW YORK MELLON TRUST COMPANY, N.A., AS NOTES COLLATERAL AGENT
Reel/Frame 056136/0752 →
SECURITY INTEREST Recorded Mar 3, 2021
From: EMC IP HOLDING COMPANY LLC; DELL PRODUCTS L.P.
To: THE BANK OF NEW YORK MELLON TRUST COMPANY, N.A., AS NOTES COLLATERAL AGENT
Reel/Frame 055479/0051 →
SECURITY INTEREST Recorded Mar 3, 2021
From: EMC IP HOLDING COMPANY LLC; DELL PRODUCTS L.P.
To: THE BANK OF NEW YORK MELLON TRUST COMPANY, N.A., AS NOTES COLLATERAL AGENT
Reel/Frame 055479/0342 →
SECURITY AGREEMENT Recorded Feb 25, 2021
From: EMC IP HOLDING COMPANY LLC; DELL PRODUCTS L.P.
To: CREDIT SUISSE AG, CAYMAN ISLANDS BRANCH
Reel/Frame 055408/0697 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jan 21, 2021
From: LAMBERT, TIMOTHY M.; KENNEDY, JEFFREY L.; BHAVSAR, NIHIT S.
To: DELL PRODUCTS L.P.
Reel/Frame 054989/0787 →
Cited By (1)
US 12,306,784