IP Library Granted Patent US 11,672,077
Granted Patent B2
US 11,672,077 · App. 17/158,524 · Granted Jun 6, 2023

Zoned dielectric loss circuit board system

Inventor: Umesh Chandra (Santa Cruz, CA)
Assignee: Dell Products L.P.
H05K1/024H05K1/0245
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Quick Facts
Patent No.
US 11,672,077
App. No.
17/158,524
Granted
Jun 6, 2023
Kind
B2
Abstract

A zoned dielectric loss circuit board system includes a board. A first differential trace is included in the board. A dielectric layer is included the board and that includes a first dielectric layer zone that engages the first differential trace and that includes first dielectric loss characteristics, and a second dielectric layer zone that is located immediately adjacent the first dielectric layer zone and that includes second dielectric loss characteristics that are greater than the first dielectric loss characteristics. A second differential trace may be included in the board in engagement with the second dielectric layer zone, and may have a second trace length that is shorter than a first trace length of the first differential trace.

Claims (41)

1. A zoned dielectric loss circuit board system, comprising:

a board;

a first differential trace that is included in the board; and

a prepreg layer that is included in the board and that includes:

a first dielectric layer zone that engages the first differential trace and that includes first dielectric loss characteristics; and

a second dielectric layer zone that is located immediately adjacent the first dielectric layer zone and that includes second dielectric loss characteristics that are greater than the first dielectric loss characteristics.

2. The system of claim 1 , wherein the first dielectric loss characteristics include a first dielectric constant and first dissipation factor, and wherein the second dielectric loss characteristics include a second dielectric constant that is greater than the first dielectric constant, and a second dissipation factor that is greater than the first dissipation factor.

3. The system of claim 1 , further comprising:

a second differential trace that is included in the board, wherein the second dielectric layer zone engages the second differential trace.

4. The system of claim 3 , wherein the first differential trace includes a first trace length, and wherein the second differential trace includes a second trace length that is less than the first trace length.

5. The system of claim 1 , wherein the first differential trace is a stripline trace.

6. The system of claim 1 , wherein the first differential trace is a microstrip trace.

7. An Information Handling System (IHS), comprising:

a circuit board;

a processing system that is mounted to the circuit board;

a first differential trace that is included in the circuit board and that extends from the processing system; and

a prepeg layer that is included in the circuit board and that includes:

a first dielectric layer zone that engages the first differential trace and that includes first dielectric loss characteristics; and

a second dielectric layer zone that is located immediately adjacent the first dielectric layer zone and that includes second dielectric loss characteristics that are greater than the first dielectric loss characteristics.

8. The IHS of claim 7 , wherein the first dielectric loss characteristics include a first dielectric constant and first dissipation factor, and wherein the second dielectric loss characteristics include a second dielectric constant that is greater than the first electric constant, and a second dissipation factor that is greater than the first dissipation factor.

9. The IHS of claim 7 , further comprising:

a second differential trace that is included in the circuit board and that extends from the processing system, wherein the second dielectric layer zone engages the second differential trace.

10. The IHS of claim 9 , wherein the first differential trace includes a first trace length, and wherein the second differential trace includes a second trace length that is less than the first trace length.

11. The IHS of claim 7 , wherein the first differential trace is a stripline trace.

12. The IHS of claim 7 , wherein the first differential trace is a microstrip trace.

13. The IHS of claim 7 , further comprising:

a connector that is mounted to the circuit board and coupled to the processing system via the first differential trace.

14. A method transmitting signals in a zoned dielectric loss circuit board, comprising:

receiving, by a first differential trace that is located in a circuit board and that engages a first dielectric layer zone that is included in a prepeg layer in the circuit board, a first signal;

transmitting, by the first differential trace, the first signal, wherein first signal losses associated with the transmission of the first signal by the first differential trace are below a signal loss threshold due to first dielectric loss characteristics of the first dielectric layer zone;

receiving, by a second differential trace that is located in the circuit board and that engages a second dielectric layer zone that is included in the prepeg layer in the circuit board, a second signal; and

transmitting, by the second differential trace, the second signal, wherein second signal losses associated with the transmission of the second signal by the second differential trace are below the signal loss threshold due to second dielectric loss characteristics of the second dielectric layer zone that are different than the first dielectric loss characteristics.

15. The method of claim 14 , first dielectric loss characteristics include a first dielectric constant and first dissipation factor, and wherein the second dielectric loss characteristics include a second dielectric constant that is greater than the first electric constant, and a second dissipation factor that is greater than the first dissipation factor.

16. The method of claim 14 , wherein the first differential trace includes a first trace length, and wherein the second differential trace includes a second trace length that is less than the first trace length.

17. The method of claim 16 , wherein the second dielectric loss characteristics are greater than the first dielectric loss characteristics.

18. The method of claim 14 , wherein the first differential trace and the second trace are stripline traces.

19. The method of claim 14 , wherein the first differential trace and the second trace are microstrip traces.

20. The method of claim 14 , further comprising:

generating, by a processing system that is mounted to the circuit board, the first signal and the second signal;

transmitting, by the processing system, the first signal to the first differential trace; and

transmitting, by the processing system, the second signal to the second differential trace.

Assignments (9)
RELEASE OF SECURITY INTEREST IN PATENTS PREVIOUSLY RECORDED AT REEL/FRAME (055479/0342) Recorded Jun 10, 2022
From: THE BANK OF NEW YORK MELLON TRUST COMPANY, N.A., AS NOTES COLLATERAL AGENT
To: EMC IP HOLDING COMPANY LLC; DELL PRODUCTS L.P.
Reel/Frame 062021/0460 →
RELEASE OF SECURITY INTEREST IN PATENTS PREVIOUSLY RECORDED AT REEL/FRAME (055479/0051) Recorded Jun 10, 2022
From: THE BANK OF NEW YORK MELLON TRUST COMPANY, N.A., AS NOTES COLLATERAL AGENT
To: EMC IP HOLDING COMPANY LLC; DELL PRODUCTS L.P.
Reel/Frame 062021/0663 →
RELEASE OF SECURITY INTEREST IN PATENTS PREVIOUSLY RECORDED AT REEL/FRAME (056136/0752) Recorded Jun 10, 2022
From: THE BANK OF NEW YORK MELLON TRUST COMPANY, N.A., AS NOTES COLLATERAL AGENT
To: EMC IP HOLDING COMPANY LLC; DELL PRODUCTS L.P.
Reel/Frame 062021/0771 →
RELEASE OF SECURITY INTEREST AT REEL 055408 FRAME 0697 Recorded Nov 2, 2021
From: CREDIT SUISSE AG, CAYMAN ISLANDS BRANCH
To: DELL PRODUCTS L.P.; EMC IP HOLDING COMPANY LLC
Reel/Frame 058001/0553 →
SECURITY INTEREST Recorded Mar 3, 2021
From: EMC IP HOLDING COMPANY LLC; DELL PRODUCTS L.P.
To: THE BANK OF NEW YORK MELLON TRUST COMPANY, N.A., AS NOTES COLLATERAL AGENT
Reel/Frame 056136/0752 →
SECURITY INTEREST Recorded Mar 3, 2021
From: EMC IP HOLDING COMPANY LLC; DELL PRODUCTS L.P.
To: THE BANK OF NEW YORK MELLON TRUST COMPANY, N.A., AS NOTES COLLATERAL AGENT
Reel/Frame 055479/0051 →
SECURITY INTEREST Recorded Mar 3, 2021
From: EMC IP HOLDING COMPANY LLC; DELL PRODUCTS L.P.
To: THE BANK OF NEW YORK MELLON TRUST COMPANY, N.A., AS NOTES COLLATERAL AGENT
Reel/Frame 055479/0342 →
SECURITY AGREEMENT Recorded Feb 25, 2021
From: EMC IP HOLDING COMPANY LLC; DELL PRODUCTS L.P.
To: CREDIT SUISSE AG, CAYMAN ISLANDS BRANCH
Reel/Frame 055408/0697 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jan 26, 2021
From: CHANDRA, UMESH
To: DELL PRODUCTS L.P.
Reel/Frame 055034/0766 →
Continuity (1)
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