IP Library Patent Application 17160566
Patent Application
App. No. 17/160,566

RANK-CORRELATED PATTERNS FOR GUIDING HARDWARE DESIGN

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Patent No.
US None
App. No.
17/160,566
Abstract

A system and method for implementing design cycles for developing a hardware component including receiving sets of experimental data, each of set experimental data resulting from an application of a set of variables to the hardware component during a common or a different design cycle of the hardware component, where each variable represents an aspect of the hardware component, determining discretized classes of the experimental data based on one or more quality metrics, and obtaining statistical measurements of the variables to determine correlations between the discretized classes of the quality metrics and the statistical measurements of variables for determining a pattern of the quality metrics to reduce the number of design cycles implemented on the hardware component during the developing of the hardware component.

Claims (38)

1 . A method of implementing design cycles for developing a hardware component comprising:

receiving sets of experimental data, each set of experimental data resulting from an application of a set of variables to the hardware component during a common design cycle or a different design cycle of the hardware component, each variable representing an aspect of hardware component or an aspect of a fabrication process applied to the hardware component;

determining discretized classes of one or more quality metrics, wherein the discretized classes of the quality metrics are determined independently from a determination of discretized classes of a different quality metric of the one or more quality metrics, wherein the discretized classes of the quality metrics are a classification of the quality metrics in an order of values of the experimental data; and

obtaining statistical measurements of the variables to determine correlations between the discretized classes of the quality metrics and the statistical measurements of the variables to reduce the number of design cycles implemented on the hardware component during the developing of the hardware component.

2 . The method of claim 1 , further comprising:

performing the discretized classes by applying an unsupervised clustering model to the quality metrics.

3 . The method of claim 2 , wherein the unsupervised clustering model is a Gaussian Mixture Model (GMM).

4 . The method of claim 1 , wherein the statistical measurements are based on characteristics of a distribution of the experimental data for each variable.

5 . The method of claim 1 , wherein the statistical measurements include mean, median, variance, or percentile.

6 . The method of claim 1 , further comprising:

performing the statistics measurements of the variables for each of the classes of the quality metrics.

7 . The method of claim 1 , further comprising:

generating a dataset corresponding to the classes of the quality metrics to the statistics measurements of the variables.

8 . The method of claim 7 , wherein a rank-correlated mining algorithm is applied to the dataset to mine for patterns of rank correlation.

9 . The method of claim 1 , further comprising:

selecting one or more rank correlation patterns based on a frequency in the dataset.

10 . The method of claim 9 , wherein the order of the rank correlation patterns is arranged from most relevant to less relevant so as to be used in further analysis of the hardware fabrication or design process.

11 . The method of claim 9 , wherein a rank correlation pattern of the one or more rank correlation patterns is based on an increase or a decrease of one or more of the statistical measurements corresponding to an increase or a decrease of an order of value of one or more quality metrics.

12 . A system, comprising:

a processor; and

memory comprising instructions which, when executed by the processor, perform a method, the method comprising:

receiving sets of experimental data, each set of experimental data resulting from an application of a set of variables to the hardware component during a common design cycle or a different design cycle of the hardware component, each variable representing an aspect of hardware component or an aspect of a fabrication process applied to the hardware component;

determining discretized classes of one or more quality metrics, wherein the discretized classes of the quality metrics are determined independently from a determination of discretized classes of a different quality metric of the one or more quality metrics, wherein the discretized classes of the quality metrics are a classification of the quality metrics in an order of values of the experimental data; and

obtaining statistical measurements of the variables to determine correlations between the discretized classes of the quality metrics and the statistical measurements of the variables to reduce the number of design cycles implemented on the hardware component during the developing of the hardware component.

13 . The system of claim 12 , wherein the method further comprises:

performing the discretized classes by applying an unsupervised clustering model to the quality metrics.

14 . The system of claim 13 , wherein the unsupervised clustering model is a Gaussian Mixture Model (GMM).

15 . The system of claim 12 , wherein the statistical measurements are based on characteristics of a distribution of the experimental data for each variable.

16 . The system of claim 12 , wherein the statistical measurements include mean, median, variance, or percentile.

17 . The system of claim 12 , further comprising:

performing obtaining the statistics measurements of the variables for each of the classes of the quality metrics.

18 . The system of claim 12 , further comprising:

generating a dataset corresponding to the classes of the quality metrics to the statistics measurements of the variables.

19 . The system of claim 18 , wherein a rank-correlated mining algorithm is applied to the dataset to mine for patterns of rank correlation.

20 . A non-transitory computer readable medium comprising computer readable program code, which when executed by a computer processor enables the computer processor to perform a method for implementing design cycles for developing a hardware component comprising:

receiving sets of experimental data, each set of experimental data resulting from an application of a set of variables to the hardware component during a common design cycle or a different design cycle of the hardware component, each variable representing an aspect of hardware component or an aspect of a fabrication process applied to the hardware component;

determining discretized classes of one or more quality metrics, wherein the discretized classes of the quality metrics are determined independently from a determination of discretized classes of a different quality metric of the one or more quality metrics, wherein the discretized classes of the quality metrics are a classification of the quality metrics in an order of values of the experimental data; and

obtaining statistical measurements of the variables to determine correlations between the discretized classes of the quality metrics and the statistical measurements of the variables to reduce the number of design cycles implemented on the hardware component during the developing of the hardware component.

Assignments (9)
RELEASE OF SECURITY INTEREST IN PATENTS PREVIOUSLY RECORDED AT REEL/FRAME (055479/0342) Recorded Jun 10, 2022
From: THE BANK OF NEW YORK MELLON TRUST COMPANY, N.A., AS NOTES COLLATERAL AGENT
To: EMC IP HOLDING COMPANY LLC; DELL PRODUCTS L.P.
Reel/Frame 062021/0460 →
RELEASE OF SECURITY INTEREST IN PATENTS PREVIOUSLY RECORDED AT REEL/FRAME (055479/0051) Recorded Jun 10, 2022
From: THE BANK OF NEW YORK MELLON TRUST COMPANY, N.A., AS NOTES COLLATERAL AGENT
To: EMC IP HOLDING COMPANY LLC; DELL PRODUCTS L.P.
Reel/Frame 062021/0663 →
RELEASE OF SECURITY INTEREST IN PATENTS PREVIOUSLY RECORDED AT REEL/FRAME (056136/0752) Recorded Jun 10, 2022
From: THE BANK OF NEW YORK MELLON TRUST COMPANY, N.A., AS NOTES COLLATERAL AGENT
To: EMC IP HOLDING COMPANY LLC; DELL PRODUCTS L.P.
Reel/Frame 062021/0771 →
RELEASE OF SECURITY INTEREST AT REEL 055408 FRAME 0697 Recorded Nov 2, 2021
From: CREDIT SUISSE AG, CAYMAN ISLANDS BRANCH
To: DELL PRODUCTS L.P.; EMC IP HOLDING COMPANY LLC
Reel/Frame 058001/0553 →
SECURITY INTEREST Recorded Mar 3, 2021
From: EMC IP HOLDING COMPANY LLC; DELL PRODUCTS L.P.
To: THE BANK OF NEW YORK MELLON TRUST COMPANY, N.A., AS NOTES COLLATERAL AGENT
Reel/Frame 056136/0752 →
SECURITY INTEREST Recorded Mar 3, 2021
From: EMC IP HOLDING COMPANY LLC; DELL PRODUCTS L.P.
To: THE BANK OF NEW YORK MELLON TRUST COMPANY, N.A., AS NOTES COLLATERAL AGENT
Reel/Frame 055479/0051 →
SECURITY INTEREST Recorded Mar 3, 2021
From: EMC IP HOLDING COMPANY LLC; DELL PRODUCTS L.P.
To: THE BANK OF NEW YORK MELLON TRUST COMPANY, N.A., AS NOTES COLLATERAL AGENT
Reel/Frame 055479/0342 →
SECURITY AGREEMENT Recorded Feb 25, 2021
From: EMC IP HOLDING COMPANY LLC; DELL PRODUCTS L.P.
To: CREDIT SUISSE AG, CAYMAN ISLANDS BRANCH
Reel/Frame 055408/0697 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Feb 2, 2021
From: FERREIRA, PAULA ABELHA; PRADO, ADRIANA BECHARA; DIAS, JONAS FURTADO
To: EMC IP HOLDING COMPANY LLC
Reel/Frame 055109/0384 →