Systems and methods for auxiliary power dropout protection
The disclosure features circuits and methods for protecting transistors of a wireless power receiver, which can be controlled by gate drivers powered by an auxiliary power source. The circuit can include a comparator configured to generate a signal indicating a comparison of a value of the auxiliary power source to a predetermined threshold, and a fault latch coupled to the comparator. The fault latch can be configured to trigger based on the generated signal and transmit a signal to respective inputs of the gate drivers to cause a latched-on state of respective gates of the transistors. Switches respectively coupled to the gate drivers can be configured to disconnect respective outputs of the gate drivers from the respective transistor gates. Gate hold-up circuits respectively coupled to the respective transistor gates can be configured to maintain the latched-on state of the respective transistor gates for a period of time.
1. A method for protecting one or more components of a wireless power receiver comprising one or more transistors configured to be controlled by respective one or more gate drivers, the gate drivers configured to be powered by an auxiliary power source, the method comprising:
generating, by a comparator, a signal indicating a comparison of a value of the auxiliary power source to a predetermined threshold;
triggering a fault latch based on the generated signal, the triggering comprising transmitting a signal to respective inputs of the gate drivers to cause a latched-on state of respective gates of the one or more transistors;
disconnecting, by one or more switches respectively coupled to the one or more gate drivers, respective outputs of the gate drivers from the respective transistor gates; and
maintaining, by one or more gate hold-up circuits respectively coupled to the transistor gates, the latched-on state of the respective transistor gates for a period of time.
2. The method of claim 1 wherein the period of time at least partially overlaps with a duration associated with a voltage induced on a resonator of the wireless power receiver.
3. The method of claim 1 wherein the auxiliary power source is a voltage source, and the period of time at least partially overlaps with a duration in which the value of the auxiliary power source is zero volts.
4. The method of claim 1 wherein the one or more gate drivers are configured to drive the respective transistor gates of a tunable matching network of the wireless power receiver.
5. The method of claim 1 wherein the one or more gate drivers are configured to drive the respective transistor gates of a protection circuit coupled to a rectifier input or a rectifier output of the wireless power receiver.
6. The method of claim 1 wherein the value of the auxiliary power source is a voltage value.
7. The method of claim 1 wherein the signal indicates whether the value of the auxiliary power source is above or below the predetermined threshold.
8. The method of claim 1 wherein the one or more gate hold-up circuits each comprise at least one pull-up resistor.
9. The method of claim 1 wherein the one or more gate hold-up circuits each comprise at least one capacitor having a capacitance value based on the period of time.
10. The method of claim 1 wherein the period is 2 seconds or less.
11. A protection circuit for one or more components of a wireless power receiver, the one or more components comprising one or more transistors configured to be controlled by respective gate drivers, the gate drivers configured to be powered by an auxiliary power source, the circuit comprising:
a comparator configured to generate a signal indicating a comparison of a value of the auxiliary power source to a predetermined threshold;
a fault latch coupled to the comparator, the fault latch configured to trigger based on the generated signal and transmit a signal to respective inputs of the gate drivers to cause a latched-on state of respective gates of the one or more transistors;
one or more switches respectively coupled to the one or more gate drivers and configured to disconnect respective outputs of the gate drivers from the respective transistor gates; and
one or more gate hold-up circuits respectively coupled to the transistor gates and configured to maintain the latched-on state of the respective transistor gates for a period of time.
12. The circuit of claim 11 wherein the period of time at least partially overlaps with a duration associated with a voltage induced on a resonator of the wireless power receiver.
13. The circuit of claim 11 wherein the auxiliary power source is a voltage source, and the period of time at least partially overlaps with a duration in which the value of the auxiliary power source is zero volts.
14. The circuit of claim 11 wherein the one or more gate drivers are configured to drive the one or more respective transistor gates of a tunable matching network of the wireless power receiver.
15. The circuit of claim 11 wherein the one or more gate drivers are configured to drive the one or more respective transistor gates of a protection circuit coupled to a rectifier input or a rectifier output of the wireless power receiver.
16. The circuit of claim 11 wherein the value of the auxiliary power source is a voltage.
17. The circuit of claim 11 wherein the signal indicates whether the value of the auxiliary power source is above or below the predetermined threshold.
18. The circuit of claim 11 wherein the one or more gate hold-up circuits each comprise at least one pull-up resistor.
19. The circuit of claim 11 wherein the one or more gate hold-up circuits each comprise at least one capacitor having a capacitance value based on the period of time.
20. The circuit of claim 12 wherein the period is 2 seconds or greater.