Universal asynchronous receiver/transmitter interface for light emitting diode system
A LED controller for an LED pixel array includes a serial interface to an external data bus, along with an address generator connected to the serial interface and the LED pixel array. An image frame buffer is connected to the interface to receive image data and further connected to the address generator to receive an image frame buffer address. A command and control module is connected to the serial interface and configured to modify image frame buffer output signals. A calibration data storage module is connected to the command and control module to store calibration data related to pixel voltage response in the LED pixel array and enable modification of voltage provided by the dynamic power supply at least in part based on the image presented by the LED pixel array.
1. A control for a light emitting pixel array, comprising:
a frame buffer to store image data, the image data to be utilized to drive pixels of the light emitting pixel array;
a universal asynchronous receiver/transmitter (UART) interface coupled to the frame buffer, the UART interface to receive the image data from an external element; and
conversion circuitry coupled to the UART interface, the conversion circuitry to receive the image data in a first bit length from the UART interface and translate, using a piece-wise linear interpolation curve, the image data into a second bit length to be provided to the frame buffer, the first bit length less than the second bit length.
2. The control of claim 1 , wherein the first bit length is 8 bits, and wherein the second bit length is 10 bits.
3. The control of claim 1 , further comprising a multiplexer coupled between the UART interface and the frame buffer, the multiplexer to select an interface from a plurality of interfaces to be coupled to the frame buffer to provide the image data to the frame buffer, wherein the plurality of interfaces includes the UART interface.
4. The control of claim 1 , further comprising a standby frame buffer to store default image data, wherein the standby frame buffer and the frame buffer are coupled in parallel between the UART interface and a second multiplexer, and wherein the second multiplexer is to select which of the frame buffer or the standby frame buffer is to be coupled to the light emitting pixel array.
5. The control of claim 4 , further comprising a display buffer to be coupled between the multiplexer and the light emitting pixel array, wherein the display buffer is to store an output of the multiplexer, the output to be utilized to drive the pixels of the light emitting pixel array.
6. The control of claim 3 , further comprising cyclic redundancy check (CRC) circuitry coupled between the multiplexer and the frame buffer, the CRC circuitry to perform a CRC on the image data output by the multiplexer.
7. A lighting system, comprising:
a light emitting pixel array having a plurality of pixels to emit light; and
a control coupled to the light emitting pixel array, the control including:
a universal asynchronous receiver/transmitter (UART) interface to receive image data, the image data to be utilized to drive the pixels of the light emitting pixel array; and
conversion circuitry coupled to the UART interface, wherein the image data to be received by the UART interface has a first bit length, and wherein the conversion circuitry is to translate, using a piece-wise linear interpolation curve, the image data from the first bit length to a second bit length, the first bit length less than the second bit length.
8. The lighting system of claim 7 , wherein the first bit length is 8 bits, and wherein the second bit length is 10 bits.
9. The lighting system of claim 7 , wherein the control further includes a pixel driver having:
a switch coupled between a light emitting diode (LED) of the light emitting pixel array and a current source for powering the LED; and
a bidirectional switch coupled between the switch and the LED, wherein the bidirectional switch is to inject a small current into the LED for characterization or test purposes.
10. The lighting system of claim 9 , wherein the bidirectional switch is further to be utilized for monitoring a forward voltage of the LED.
11. The lighting system of claim 7 , wherein the control further includes a pixel driver having:
a field effect transistor (FET) to be coupled between a light emitting diode (LED) of the light emitting pixel array and a current source for powering the LED; and
an operational amplifier with an output of the operational amplifier coupled to a gate of the FET, a first input of the operational amplifier to receive a reference voltage and a second input of the operational amplifier is coupled to the current source, the operational amplifier to set a maximum current to be provided to the LED.
12. The lighting system of claim 7 , wherein the control further includes:
a pixel driver to drive a light emitting diode (LED) of the light emitting pixel array; and
a fault detection circuit to be selectively coupled between the pixel driver and the LED, the fault detection circuit to determine whether there is a fault in the pixel driver or the LED.
13. The lighting system of claim 12 , wherein the fault detection circuit includes:
a first comparator to compare an open threshold voltage with a forward voltage of the LED to determine whether the LED is open or the pixel driver is shorted; and
a second comparator to compare a short threshold voltage with the forward voltage of the LED to determine whether the LED is shorted or the pixel driver is open.
14. The lighting system of claim 12 , wherein the LED is a first LED and the pixel driver is a first pixel driver, wherein the control further includes a second pixel driver to drive a second LED of the light emitting pixel array, the fault detection circuit to be selectively coupled between the second pixel driver and the second LED, and the fault detection circuit to determine whether there is a fault in the second pixel driver or the second LED.
15. The lighting system of claim 7 , wherein the control further includes over temperature protection (OTP) circuitry coupled to one or more temperature sensors of the light emitting pixel array, the OTP circuitry to determine whether a temperature of the light emitting pixel array exceeds a threshold temperature.
16. A hardware arrangement for a lighting system, comprising:
a light emitting diode (LED) die having a light emitting pixel array;
a board to couple the hardware arrangement to an external system; and
a complementary metal oxide semiconductor (CMOS) backplane coupled to the LED die and the board, the CMOS backplane to provide image data to the LED die to cause the light emitting pixel array to present an image, wherein the CMOS backplane includes:
a universal asynchronous receiver/transmitter (UART) interface coupled to the board, the UART to receive the image data from the board; and
conversion circuitry coupled to the UART interface, the conversion circuitry to receive the image data in a first bit length from the UART interface and translate, using a piece-wise linear interpolation curve, the image data into a second bit length to be utilized for driving LEDs of the light emitting pixel array, the first bit length less than the second bit length.
17. The hardware arrangement of claim 16 , wherein the first bit length is 8 bits, and wherein the second bit length is 10 bits.