IP Library Granted Patent US 11,647,627
Granted Patent B2
US 11,647,627 · App. 17/168,952 · Granted May 9, 2023

Integrated circuit device

Inventors: Jiseok Hong (Suwon-si, KR); Sangho Lee (Seoul, KR); Seoryong Park (Ansan-si, KR); Jiyoung Ahn (Seoul, KR); Kiseok Lee (Seoul, KR); Kiseok Lee (Hwaseong-si, KR); Yoonyoung Choi (Seoul, KR); Seunguk Han (Suwon-si, KR)
Assignee: SAMSUNG ELECTRONICS CO., LTD.
H01L27/10888H01L27/10814H01L27/10855H01L27/10885
View Patent ↗
Loading inventors, assignments & file history…
Monitor This Case
Get email alerts when status or documents change.
Order Certified Copies
Most orders are placed with the USPTO same day — all within 24 business hours.
Order via The Patent Place →
Pre-filled with this patent's details
Quick Facts
Patent No.
US 11,647,627
App. No.
17/168,952
Granted
May 9, 2023
Kind
B2
Abstract

An integrated circuit device includes: a substrate including a plurality of active regions; a bit line extending on the substrate in a horizontal direction; a direct contact connected between a first active region selected among the plurality of active regions and the bit line; an inner oxide layer contacting a sidewall of the direct contact; and a carbon-containing oxide layer nonlinearly extending on a sidewall of the bit line in a vertical direction, the carbon-containing oxide layer contacting the sidewall of the bit line.

Claims (77)

1. An integrated circuit device comprising:

a substrate comprising a plurality of active regions;

a bit line extending on the substrate in a first direction;

a direct contact connected between a first active region among the plurality of active regions and the bit line;

an inner oxide layer contacting a sidewall of the direct contact; and

a carbon-containing oxide layer extending on a sidewall of the bit line in a second direction perpendicular to the first direction, the carbon-containing oxide layer contacting the sidewall of the bit line,

wherein the inner oxide layer is separate from the carbon-containing oxide layer.

2. The device of claim 1 , further comprising a contact plug connected to a second active region adjacent to the first active region among the plurality of active regions, the contact plug extending on the substrate in the second direction, and

a gap fill insulating pattern provided between a lower portion of the contact plug and the direct contact,

wherein the inner oxide layer comprises a first portion provided between the direct contact and the gap fill insulating pattern, and

the carbon-containing oxide layer comprises a protrusion protruding outward from the bit line at a higher level than a top surface of the gap fill insulating pattern in the second direction.

3. The device of claim 2 , further comprising a gap fill insulating pattern that covers a sidewall of the contact plug,

wherein at least a portion of each of the inner oxide layer and the carbon-containing oxide layer is provided between the direct contact and the gap fill insulating pattern.

4. The device of claim 1 , further comprising a contact plug connected to a second active region adjacent to the first active region among the plurality of active regions, the contact plug extending on the substrate in the second direction, and

a gap fill insulating pattern provided between a lower portion of the contact plug and the direct contact,

wherein the inner oxide layer is spaced apart from the contact plug with the gap fill insulating pattern therebetween, and

the carbon-containing oxide layer comprises a first portion provided between the direct contact and the gap fill insulating pattern and a second portion contacting the direct contact.

5. The device of claim 1 , further comprising a gap fill insulating pattern covering a sidewall of the contact plug,

wherein the inner oxide layer comprises a first portion provided between the direct contact and the gap fill insulating pattern, and

wherein the carbon-containing oxide layer is not provided between the direct contact and the gap fill insulating pattern.

6. The device of claim 1 , further comprising a contact plug connected to a second active region adjacent to the first active region among the plurality of active regions, the contact plug extending on the substrate in the second direction,

a gap fill insulating pattern provided between a lower portion of the contact plug and the direct contact, and

an outer insulating spacer covering the sidewall of the bit line on the gap fill insulating pattern,

wherein the inner oxide layer comprises a first portion provided between the direct contact and the gap fill insulating pattern and a second portion contacting the direct contact, and

the carbon-containing oxide layer is spaced apart from the contact plug with the outer insulating spacer therebetween.

7. The device of claim 1 , further comprising a gap fill insulating pattern contacting the inner oxide layer, the gap fill insulating pattern facing the direct contact with the inner oxide layer therebetween, and

an outer insulating spacer covering the sidewall of the bit line on the gap fill insulating pattern,

wherein the carbon-containing oxide layer comprises a protrusion protruding toward the outer insulating spacer at a higher level than the top surface of the gap fill insulating pattern in the second direction.

8. The device of claim 1 , further comprising an outer insulating spacer extending in the second direction to cover the sidewall of the bit line on the inner oxide layer, the outer insulating spacer being apart from the inner oxide layer, and

an intermediate insulating spacer provided between the inner oxide layer and the outer insulating spacer to cover the sidewall of the bit line,

wherein the carbon-containing oxide layer comprises a protrusion protruding toward the outer insulating spacer provided between the bit line and the outer insulating spacer, and the protrusion contacts a bottom surface of the intermediate insulating spacer.

9. The device of claim 1 , further comprising an outer insulating spacer extending in the second direction to cover the sidewall of the bit line on the inner oxide layer, the outer insulating spacer being apart from the inner oxide layer, and

an intermediate insulating spacer provided between the inner oxide layer and the outer insulating spacer to cover the sidewall of the bit line,

wherein the carbon-containing oxide layer comprises a first portion provided between the bit line and the intermediate insulating spacer, a second portion integrally connected to the first portion and contacting the sidewall of the inner oxide layer, and a third portion integrally connected to the first portion and contacting a bottom surface of the intermediate insulating spacer.

10. The device of claim 1 , wherein, in the second direction, an uppermost surface of the inner oxide layer is on an identical level to an uppermost surface of the direct contact,

wherein the direct contact comprises a doped polysilicon layer, the inner oxide layer comprises a silicon oxide layer, and the carbon-containing oxide layer comprises an SiOC layer.

11. The device of claim 1 , further comprising an outer insulating spacer extending in the second direction to cover the sidewall of the bit line on the inner oxide layer, the outer insulating spacer being apart from the inner oxide layer, and

an intermediate insulating spacer provided between the inner oxide layer and the outer insulating spacer to cover the sidewall of the bit line,

wherein the intermediate insulating spacer comprises a silicon oxide layer, an air spacer, or a combination thereof.

12. An integrated circuit device comprising:

a substrate comprising a plurality of active regions;

a plurality of bit lines spaced apart from each other on the substrate in a first direction, the plurality of bit lines extending in a second direction crossing the first direction;

a direct contact provided between a first active region among the plurality of active regions and a first bit line among the plurality of bit lines;

a contact plug connected to a second active region adjacent to the first active region among the plurality of active regions, the contact plug extending on the substrate in a third direction perpendicular to the first direction and the second direction; and

a spacer structure provided between the first bit line and the contact plug,

wherein the spacer structure comprises:

an inner oxide layer contacting a sidewall of the direct contact; and

a carbon-containing oxide layer extending on a sidewall of the first bit line in the third direction, the carbon-containing oxide layer being in direct contact with a sidewall of the first bit line,

wherein the inner oxide layer is separate from the carbon-containing oxide layer.

13. The device of claim 12 , wherein a portion of the inner oxide layer overlaps a portion of the carbon-containing oxide layer in the third direction.

14. The device of claim 12 , wherein each of the plurality of bit lines comprises a lower conductive layer comprising a doped polysilicon layer and an upper conductive layer comprising a metal,

the inner oxide layer contacts the lower conductive layer of the first bit line, and

the carbon-containing oxide layer contacts the upper conductive layer of the first bit line.

15. The device of claim 12 , wherein the spacer structure further comprises a gap fill insulating pattern provided between a lower portion of the contact plug and the direct contact,

wherein the inner oxide layer comprises a first portion provided between the direct contact and the gap fill insulating pattern, and

the carbon-containing oxide layer comprises a protrusion protruding outward from the bit line at a higher level than a top surface of the gap fill insulating pattern in the third direction.

16. The device of claim 12 , wherein the spacer structure further comprises a gap fill insulating pattern provided between a lower portion of the contact plug and the direct contact, and

each of the inner oxide layer and the carbon-containing oxide layer comprises a first portion provided between the direct contact and the gap fill insulating pattern.

17. The device of claim 12 , wherein the spacer structure further comprises a gap fill insulating pattern provided between a lower portion of the contact plug and the direct contact,

the inner oxide layer comprises a first portion provided between the direct contact and the gap fill insulating pattern, and

wherein the carbon-containing oxide layer is not provided between the direct contact and the gap fill insulating pattern.

18. The device of claim 12 , wherein the spacer structure further comprises:

an outer insulating spacer extending in the third direction to cover the sidewall of the first bit line on the inner oxide layer, the outer insulating spacer being apart from the inner oxide layer, and

an intermediate insulating spacer provided between the inner oxide layer and the outer insulating spacer to cover the sidewall of the first bit line,

wherein the intermediate insulating spacer comprises a silicon oxide layer, an air spacer, or a combination thereof.

19. An integrated circuit device comprising:

a substrate comprising a plurality of active regions spaced apart from each other;

a first bit line and a second bit line spaced apart from each other on the substrate in a first direction, the first bit line and the second bit line extending in a second direction crossing the first direction;

a plurality of contact plugs arranged in a row between the first bit line and the second bit line in the second direction;

a plurality of insulating fences provided respectively between the plurality of contact plugs;

a direct contact connected between a first active region among the plurality of active regions and the first bit line; and

a spacer structure provided between the first bit line and the contact plug,

wherein the spacer structure comprises:

an inner oxide layer contacting a sidewall of the direct contact, the inner oxide layer comprising a silicon oxide layer; and

an SiOC layer extending on a sidewall of the first bit line in a third direction, the SiOC layer contacting the sidewall of the first bit line,

wherein the inner oxide layer is separate from the carbon-containing oxide layer.

20. The device of claim 1 , wherein the inner oxide layer is provided between the carbon-containing oxide layer and the direct contact.

Assignments (2)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Feb 5, 2021
From: HONG, JISEOK; LEE, SANGHO; PARK, SEORYONG; AHN, JIYOUNG; LEE, KISEOK; CHOI, YOONYOUNG; HAN, SEUNGUK
To: SAMSUNG ELECTRONICS CO., LTD.
Reel/Frame 055167/0422 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Feb 5, 2021
From: LEE, KISEOK
To: SAMSUNG ELECTRONICS CO., LTD.
Reel/Frame 055167/0480 →
Priority Claims (1)
KR 10-2020-0076763 · Jun 23, 2020 · national
Continuity (1)
Related Publication 20210398569A1 · Dec 23, 2021