IP Library Granted Patent US 12,088,470
Granted Patent B2
US 12,088,470 · App. 17/175,449 · Granted Sep 10, 2024

Management of non-volatile memory express nodes

Inventors: Marjan Radi (San Jose, CA); Dejan Vucinic (San Jose, CA)
Assignee: Western Digital Technologies, Inc.
H04L41/12H04L41/14H04L67/1097
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Quick Facts
Patent No.
US 12,088,470
App. No.
17/175,449
Granted
Sep 10, 2024
Kind
B2
Abstract

A programmable switch includes ports configured to communicate with Non-Volatile Memory express (NVMe) nodes. The programmable switch is configured to store a mapping of NVMe namespaces to physical storage locations located in the NVMe nodes. An NVMe node is determined by the programmable switch to have become inactive, and one or more NVMe namespaces are removed from the mapping that are associated with one or more physical storage locations in the inactive NVMe node. A notification of the one or more removed NVMe namespaces is sent to a network controller. According to one aspect, the network controller stores a global mapping of NVMe namespaces to physical storage locations in the NVMe nodes. The network controller sends at least one notification of the update to at least one other programmable switch to update at least one mapping stored at the at least one other programmable switch.

Claims (51)

1. A method performed by a programmable switch, the method comprising:

storing, at the programmable switch, a mapping of Non-Volatile Memory express (NVMe) namespaces to physical storage locations located in a plurality of NVMe nodes,

wherein each NVMe node of the plurality of NVMe nodes is a separate physical device configured to communicate on a network using NVMe over Fabric (NVMeOF);

determining that an NVMe node of the plurality of NVMe nodes has become inactive;

removing one or more NVMe namespaces from the stored mapping associated with one or more physical storage locations located in the inactive NVMe node; and

sending at least one notification to at least one other NVMe node of the plurality of NVMe nodes indicating that the one or more NVMe namespaces have been removed from the mapping.

2. The method of claim 1 , further comprising determining that the NVMe node has become inactive based on at least one of detecting inactivity of a port of the programmable switch that is connected to the inactive NVMe node and reaching a predetermined number of successive unacknowledged messages sent to the inactive NVMe node.

3. The method of claim 1 , further comprising:

determining that a new NVMe node has been connected to a port of the programmable switch; and

adding one or more new NVMe namespaces to the mapping that are associated with one or more new physical storage locations in the new NVMe node.

4. The method of claim 1 , further comprising temporarily retaining data sent to a target NVMe node after sending the data in a message to the target NVMe node.

5. The method of claim 1 , further comprising:

sending a message to a target NVMe node of the plurality of NVMe nodes;

determining whether a timeout value has been reached for receiving an acknowledgment of the sent message from the target NVMe node; and

in response to the timeout value being reached without receiving the acknowledgment from the target NVMe node, resending the message to the target NVMe node.

6. The method of claim 1 , wherein the mapping indicates NVMe nodes of the plurality of NVMe nodes that have accessed data in a particular NVMe namespace.

7. The method of claim 1 , further comprising sending a notification to a network controller of the removed one or more NVMe namespaces to update a global mapping of active NVMe namespaces to NVMe nodes in the network.

8. The method of claim 1 , wherein the programmable switch is a Top of Rack (ToR) switch for the plurality of NVMe nodes.

9. The method of claim 1 , further comprising:

detecting the activation of a port of the programmable switch; and

in response to detecting the activation of the port, performing an NVMe discovery service to determine whether one or more new NVMe namespaces are available via the activated port.

10. A programmable switch, comprising:

a plurality of ports configured to communicate with a plurality of Non-Volatile Memory express (NVMe) nodes via a network, wherein each NVMe node of the plurality of NVMe nodes is configured to communicate on the network using NVMe over Fabric (NVMeOF);

at least one memory configured to store a mapping of NVMe namespaces to physical storage locations located in the plurality of NVMe nodes; and

circuitry configured to:

determine that an NVMe node of the plurality of NVMe nodes has become inactive by detecting a removal of a connection to the NVMe node via a port of the plurality of ports;

remove, from the mapping, one or more NVMe namespaces associated with one or more physical storage locations located in the inactive NVMe node; and

send, via the network, at least one notification to at least one other NVMe node of the plurality of NVMe nodes indicating that the one or more NVMe namespaces have been removed from the mapping.

11. The programmable switch of claim 10 , wherein the circuitry is further configured to determine that a different NVMe node has become inactive based on at least one of detecting inactivity of a port of the plurality of ports that is connected to the different NVMe node and reaching a predetermined number of successive unacknowledged messages sent to the different NVMe node.

12. The programmable switch of claim 10 , wherein the circuitry is further configured to:

determine that a new NVMe node has been connected to a port of the plurality of ports; and

add one or more new NVMe namespaces to the mapping that are associated with one or more new physical storage locations in the new NVMe node.

13. The programmable switch of claim 10 , wherein the circuitry is further configured to temporarily retain data sent to a target NVMe node after sending the data in a message to the target NVMe node.

14. The programmable switch of claim 10 , wherein the circuitry is further configured to:

send a message to a target NVMe node of the plurality of NVMe nodes;

determine whether a timeout value has been reached for receiving an acknowledgment of the sent message from the target NVMe node; and

in response to the timeout value being reached without receiving the acknowledgment from the target NVMe node, resend the message to a different NVMe node.

15. The programmable switch of claim 10 , wherein the circuitry is further configured to send a notification to a network controller of the removed one or more NVMe namespaces to update a global mapping of active NVMe namespaces to NVMe nodes in the network.

16. The programmable switch of claim 10 , wherein the mapping further indicates other NVMe nodes that have accessed data in a particular NVMe namespace.

17. The programmable switch of claim 10 , wherein the programmable switch is a Top of Rack (ToR) switch for the plurality of NVMe nodes.

18. The programmable switch of claim 10 , wherein the circuitry is further configured to:

detect activation of a port of the plurality of ports; and

in response to detecting the activation of the port, perform an NVMe discovery service to determine whether one or more new NVMe namespaces are available via the activated port.

19. A network controller for a network including a plurality of Non-Volatile Memory express (NVMe) nodes, the network controller comprising:

at least one memory storing a global mapping of active NVMe namespaces to physical blocks located in the plurality of NVMe nodes, wherein each NVMe node of the plurality of NVMe nodes is a separate physical device configured to communicate on the network;

an interface configured to communicate with a plurality of programmable switches; and

means for:

receiving a notification from a programmable switch of the plurality of programmable switches that an NVMe node has become inactive;

updating the global mapping based on the received notification to remove one or more NVMe namespaces corresponding to the inactive NVMe node; and

sending, via the network, at least one notification to at least one NVMe node of the plurality of NVMe nodes indicating that the one or more NVMe namespaces have been removed from the global mapping.

20. The network controller of claim 19 , further comprising means for identifying the at least one NVMe node using the global mapping, wherein the global mapping indicates which NVMe nodes have accessed the one or more NVMe namespaces.

Assignments (5)
PATENT COLLATERAL AGREEMENT - DDTL LOAN AGREEMENT Recorded Aug 21, 2023
From: WESTERN DIGITAL TECHNOLOGIES, INC.
To: JPMORGAN CHASE BANK, N.A.
Reel/Frame 067045/0156 →
PATENT COLLATERAL AGREEMENT - A&R LOAN AGREEMENT Recorded Aug 21, 2023
From: WESTERN DIGITAL TECHNOLOGIES, INC.
To: JPMORGAN CHASE BANK, N.A.
Reel/Frame 064715/0001 →
RELEASE OF SECURITY INTEREST AT REEL 056285 FRAME 0292 Recorded Feb 8, 2022
From: JPMORGAN CHASE BANK, N.A.
To: WESTERN DIGITAL TECHNOLOGIES, INC.
Reel/Frame 058982/0001 →
SECURITY INTEREST Recorded May 19, 2021
From: WESTERN DIGITAL TECHNOLOGIES, INC.
To: JPMORGAN CHASE BANK, N.A., AS AGENT
Reel/Frame 056285/0292 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Feb 12, 2021
From: RADI, MARJAN; VUCINIC, DEJAN
To: WESTERN DIGITAL TECHNOLOGIES, INC.
Reel/Frame 055250/0308 →