IP Library Granted Patent US 11,340,986
Granted Patent B1
US 11,340,986 · App. 17/176,765 · Granted May 24, 2022

Host-assisted storage device error correction

Inventors: Akhilesh Yadav (Bangalore, IN); Ramanathan Muthiah (Bangalore, IN)
Assignee: Western Digital Technologies, Inc.
G06F11/1076H03M13/2906
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Quick Facts
Patent No.
US 11,340,986
App. No.
17/176,765
Granted
May 24, 2022
Kind
B1
Abstract

Systems and methods for host-assisted storage device error correction are described. A host may first encode host data with a forward error correction code (ECC) and send the encoded host data to the storage device. The storage device may further encode the host data using its own ECC. The host may also provide the forward ECC parity information to be stored on the storage device in a different location than the host data. When the host data is read by the storage device, the storage device will decode with its ECC. If the storage device ECC decode is incomplete and the bit error rate is below the recoverable error threshold of the forward error correction, the partially-recovered host data will be sent to the host. The host will complete decode using the forward ECC and parity data. Forward ECC may be selectively applied to important host data.

Claims (109)

1. A system comprising:

a storage device comprising:

a processor;

a memory;

a storage interface configured to communicate with a host system;

a non-volatile storage medium configured to store host data;

an error correction code engine, stored in the memory for execution by the processor, configured to encode host data using a first error correction code configuration; and

a storage device controller, comprising the processor and the memory, configured to:

determine a residual error rate for partially-recovered host data from the error correction code engine;

determine a forward error correction threshold for the host system, wherein the forward error correction threshold is based on a second error correction code configuration; and

return, based on the residual error rate being less than the forward error correction threshold, the partially-recovered host data to the host system.

2. The system of claim 1 , wherein the storage device controller is further configured to:

read, responsive to returning the partially-recovered host data to the host system, forward error correction parity data from the storage medium; and

return the forward error correction parity data to the host system.

3. The system of claim 2 , wherein the storage device controller is further configured to:

allocate storage locations in the storage medium to a plurality of zones;

read the partially-recovered host data from a first zone of the plurality of zones; and

read the forward error correction parity data from a second zone of the plurality of zones.

4. The system of claim 3 , wherein the storage device controller is further configured to:

allocate the first zone of the plurality of zones to host data enabled for forward error correction; and

allocate the second zone of the plurality of zones to host data not enabled for forward error correction.

5. The system of claim 1 , wherein the storage device controller is further configured to:

receive, from the host system, a host data block enabled for forward error correction;

encode, using the error correction code engine and the first error correction code configuration, the host data block; and

store the encoded host data block to the storage medium.

6. The system of claim 5 , wherein the storage device controller is further configured to:

receive, from the host system, a forward error correction indicator corresponding to the host data block; and

determine, from the forward error correction indicator, that the host data block is enabled for forward error correction.

7. The system of claim 5 , wherein the storage device controller is further configured to:

receive, from the host system and separate from the host data block, forward error correction parity data for the host data block;

encode, using the error correction code engine and the first error correction code configuration, the forward error correction parity data; and

store the encoded forward error correction parity data to the storage medium.

8. The system of claim 1 , wherein:

the first error correction code configuration has a first recoverable bit error rate threshold;

the second error correction code configuration has a second recoverable bit error rate threshold that is greater than the first recoverable bit error rate threshold; and

the storage device controller is further configured to selectively return, responsive to an initial bit error rate of the partially-recovered host data being greater than the first recoverable bit error rate threshold and less than the second recoverable bit error rate threshold, the partially-recovered host data.

9. The system of claim 1 , wherein the storage device controller is further configured to:

generate, by decoding host data using a first recovery mode of the error correction code engine, the partially-recovered host data;

selectively initiate, responsive to the partially-recovered host data, a second recovery mode to retry error correction using the error correction code engine; and

return, without initiating the second recovery mode, the partially-recovered host data to the host system responsive to:

the partially-recovered host data being enabled for forward error correction; and

the residual error rate being less than the forward error correction threshold.

10. The system of claim 1 , further comprising:

the host system comprising:

a host processor;

a host memory;

a storage interface configured to communicate with the storage device; and

a forward error correction code engine, stored in the host memory for execution by the host processor, configured to:

encode host data using the second error correction code configuration;

generate forward error correction parity data for the encoded host data;

receive the partially-recovered host data from the storage device; and

decode the partially-recovered host data using the second error code correction configuration and corresponding forward error correction parity data.

11. A computer-implemented method, comprising:

encoding, in a storage device, host data from a host system using a first error correction code configuration;

storing, in a storage medium of the storage device, the encoded host data;

reading, from the storage medium of the storage device, the encoded host data;

decoding, from the encoded host data in the storage device, partially-recovered host data using the first error correction code configuration;

determining, in the storage device, a residual error rate for the partially-recovered host data;

determining, in the storage device, a forward error correction threshold for the host system, wherein the forward error correction threshold is based on a second error correction code configuration; and

returning, based on the residual error rate being less than the forward error correction threshold, the partially-recovered host data to the host system.

12. The computer-implemented method of claim 11 , further comprising:

reading, responsive to returning the partially-recovered host data to the host system, forward error correction parity data from the storage medium; and

returning the forward error correction parity data to the host system.

13. The computer-implemented method of claim 12 , further comprising:

allocating storage locations in the storage medium to a plurality of zones;

storing, by the storage device, the encoded host data to a first zone of the plurality of zones, wherein the first zone is allocated to host data enabled for forward error correction; and

storing, by the storage device, the forward error correction parity data to a second zone of the plurality of zones.

14. The computer-implemented method of claim 11 , further comprising:

receiving, from the host system, a host data block in the host data;

receiving, from the host system, a forward error correction indicator corresponding to the host data block; and

determining, from the forward error correction indicator, that the host data block is enabled for forward error correction.

15. The computer-implemented method of claim 14 , further comprising:

receiving, from the host system and separate from the host data block, forward error correction parity data for the host data block;

encoding, in the storage device and using the first error correction code configuration, the forward error correction parity data; and

storing, in the storage device, the encoded forward error correction parity data.

16. The computer-implemented method of claim 11 , further comprising:

selectively returning, responsive to an initial bit error rate of the partially-recovered host data being greater than a first recoverable bit error rate threshold and less than a second recoverable bit error rate threshold, the partially-recovered host data, wherein:

the first error correction code configuration has the first recoverable bit error rate threshold;

the second error correction code configuration has the second recoverable bit error rate threshold; and

the second recoverable bit error rate threshold is greater than the first recoverable bit error rate threshold.

17. The computer-implemented method of claim 11 , further comprising:

determining, by decoding host data using a first recovery mode of the storage device, the partially-recovered host data;

selectively initiating, responsive to the partially-recovered host data, a second recovery mode to retry error correction using the first error correction code configuration; and

returning, without initiating the second recovery mode, the partially-recovered host data to the host system responsive to:

the partially-recovered host data being enabled for forward error correction; and

the residual error rate being less than the forward error correction threshold.

18. The computer-implemented method of claim 11 , further comprising:

encoding, by the host system, host data using the second error correction code configuration, wherein encoding the host data by the storage device is re-encoding the host-encoded host data;

generating, by the host system, forward error correction parity data for the host-encoded host data;

receiving, by the host system, the partially-recovered host data from the storage device; and

decoding, by the host system, the partially-recovered host data using the second error code correction configuration and corresponding forward error correction parity data.

19. The computer-implemented method of claim 18 , further comprising:

allocating, by the host system, a host data block in the host data to be enabled for forward error correction;

generating, by the host system, a forward error correction indicator;

associating, by the host system the forward error correction indicator with the host data block;

associating, by the host system, a corresponding forward error correction parity data block with the host data block;

sending, from the host system to the storage device, the host data block, the forward error correction indicator, and the corresponding forward error correction parity data block;

requesting, by the host system and responsive to receiving the partially-recovered host data, the corresponding forward error correction parity block from the storage device, wherein the partially-recovered host data includes partially-recovered host data from the host data block; and

receiving, by the host system, the corresponding forward error correction parity block, wherein the corresponding forward error correction parity data includes the corresponding forward error correction parity block.

20. A storage system comprising:

a storage device;

a host system;

means, in the host system, for host encoding host data using a forward error correction code configuration;

means, in the storage device, for storage device encoding the host-encoded host data using a storage device error correction code configuration;

means, in the storage device, for generating, from the storage device encoded host-encoded host data, partially-recovered host-encoded host data using the storage device error correction code configuration;

means, in the storage device, for determining a residual error rate for the partially-recovered host data;

means, in the storage device, for determining a forward error correction threshold for the host system, wherein the forward error correction threshold is based on the forward error correction code configuration;

means, in the storage device, for returning, based on the residual error rate being less than the forward error correction threshold, the partially-recovered host-encoded host data to the host system; and

means, in the host system, for decoding the partially-recovered host-encoded host data using the forward error correction code configuration.

Assignments (5)
PATENT COLLATERAL AGREEMENT - A&R LOAN AGREEMENT Recorded Aug 21, 2023
From: WESTERN DIGITAL TECHNOLOGIES, INC.
To: JPMORGAN CHASE BANK, N.A.
Reel/Frame 064715/0001 →
PATENT COLLATERAL AGREEMENT - DDTL LOAN AGREEMENT Recorded Aug 21, 2023
From: WESTERN DIGITAL TECHNOLOGIES, INC.
To: JPMORGAN CHASE BANK, N.A.
Reel/Frame 067045/0156 →
RELEASE OF SECURITY INTEREST AT REEL 056285 FRAME 0292 Recorded Feb 8, 2022
From: JPMORGAN CHASE BANK, N.A.
To: WESTERN DIGITAL TECHNOLOGIES, INC.
Reel/Frame 058982/0001 →
SECURITY INTEREST Recorded May 19, 2021
From: WESTERN DIGITAL TECHNOLOGIES, INC.
To: JPMORGAN CHASE BANK, N.A., AS AGENT
Reel/Frame 056285/0292 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Feb 17, 2021
From: YADAV, AKHILESH; MUTHIAH, RAMANATHAN
To: WESTERN DIGITAL TECHNOLOGIES, INC.
Reel/Frame 055296/0406 →
Continuity (1)
Provisional Application 63122536 · Dec 8, 2020
Cited By (3)
US 12,254,202 US 12,379,992 US 12,423,181