IP Library Granted Patent US 11,824,567
Granted Patent B2
US 11,824,567 · App. 17/184,796 · Granted Nov 21, 2023

Adaptive inline polling of data compression with hardware accelerator

Inventors: Shuguang Gong (Beijing, CN); Colin Zou (San Jose, CA); Tao Chen (Beijing, CN)
Assignee: EMC IP HOLDING COMPANY LLC
H03M7/60G06F9/485G06F9/5027G06F2209/509H03M7/6017
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Quick Facts
Patent No.
US 11,824,567
App. No.
17/184,796
Granted
Nov 21, 2023
Kind
B2
Abstract

A computer implemented method of data compression using a hardware accelerator includes submitting a request to compress or decompress a data segment using a compression or decompression thread. The method also includes compressing or decompressing the data segment using a hardware accelerator, and performing inline polling of the hardware accelerator to determine whether the hardware accelerator has completed compressing or decompressing the data segment. The inline polling and the compressing or decompressing are performed in a single thread. The method also includes submitting a wakeup command to a segment thread in response to determining that the hardware accelerator has completed compressing or decompressing the data segment.

Claims (47)

1. A computer implemented method of data compression using a hardware accelerator, the method comprising:

submitting a request to compress or decompress a data segment using a compression or decompression thread;

compressing or decompressing the data segment using a hardware accelerator;

performing inline polling of the hardware accelerator to determine whether the hardware accelerator has completed compressing or decompressing the data segment, the inline polling and the compressing or decompressing being performed in a single thread; and

submitting a wakeup command to a segment thread in response to determining that the hardware accelerator has completed compressing or decompressing the data segment.

2. The computer implemented method as in claim 1 , wherein the inline polling of the hardware accelerator is performed at a polling interval based on a size of the data segment being compressed or decompressed.

3. The computer implemented method as in claim 2 , further comprising:

calculating the polling interval based on the size of the data segment being compressed or decompressed, and a known time at which the request to compress or decompress data is submitted.

4. The computer implemented method as in claim 2 , further comprising:

dynamically calculating a mean contact switch latency based on previous contact switch latencies of previous compression or decompression actions.

5. The computer implemented method as in claim 4 , further comprising:

calculating a dynamic polling interval based on a difference between the polling interval calculated based on the size of the data segment and the mean contact switch latency.

6. The computer implemented method as in claim 1 , further comprising:

performing prioritized inline polling of the hardware accelerator at a shortened polling interval in response to determining that the hardware accelerator has not completed compressing or decompressing the data segment.

7. The computer implemented method as in claim 6 , wherein the shortened polling interval is between about 10 and 30 microseconds.

8. A data compression system comprising:

one or more processing devices;

a hardware accelerator for compressing and decompressing data; and

data compression logic to compress data via the one or more processing devices, the data compression logic configured to:

submitting a request to compress or decompress a data segment using a compression or decompression thread;

compressing or decompressing the data segment using the hardware accelerator;

performing inline polling of the hardware accelerator to determine whether the hardware accelerator has completed compressing or decompressing the data segment, the inline polling and the compressing or decompressing being performed in a single thread; and

submitting a wakeup command to a segment thread in response to determining that the hardware accelerator has completed compressing or decompressing the data segment.

9. The data compression system as in claim 8 , wherein the inline polling of the hardware accelerator is performed at a polling interval based on a size of the data segment being compressed or decompressed.

10. The data compression system as in claim 9 , wherein the data compression logic is further configured to:

calculate the polling interval based on the size of the data segment being compressed or decompressed, and a known time at which the request to compress or decompress data is submitted.

11. The data compression system as in claim 9 , wherein the data compression logic is further configured to:

dynamically calculate a mean contact switch latency based on previous contact switch latencies of previous compression or decompression actions.

12. The data compression system as in claim 11 , wherein the data compression logic is further configured to:

calculate a dynamic polling interval based on a difference between the polling interval calculated based on the size of the data segment and the mean contact switch latency.

13. The data compression system as in claim 8 , wherein the data compression logic is further configured to:

perform prioritized inline polling of the hardware accelerator at a shortened polling interval in response to determining that the hardware accelerator has not completed compressing or decompressing the data segment.

14. The data compression system as in claim 13 , wherein the shortened polling interval is between about 10 and 30 microseconds.

15. A non-transitory computer-readable medium storing instructions which, when executed by one or more processors, cause the one or more processors to perform a data compression operation, the operation comprising:

submitting a request to compress or decompress a data segment using a compression or decompression thread;

compressing or decompressing the data segment using the hardware accelerator;

performing inline polling of the hardware accelerator to determine whether the hardware accelerator has completed compressing or decompressing the data segment, the inline polling and the compressing or decompressing being performed in a single thread; and

submitting a wakeup command to a segment thread in response to determining that the hardware accelerator has completed compressing or decompressing the data segment.

16. The non-transitory computer-readable medium as in claim 15 , wherein the inline polling of the hardware accelerator is performed at a polling interval based on a size of the data segment being compressed or decompressed.

17. The non-transitory computer-readable medium as in claim 16 , the operation further comprising:

calculating the polling interval based on the size of the data segment being compressed or decompressed, and a known time at which the request to compress or decompress data is submitted.

18. The non-transitory computer-readable medium as in claim 16 , the operation further comprising:

dynamically calculating a mean contact switch latency based on previous contact switch latencies of previous compression or decompression actions.

19. The non-transitory computer-readable medium as in claim 18 , the operation further comprising:

calculating a dynamic polling interval based on a difference between the polling interval calculated based on the size of the data segment and the mean contact switch latency.

20. The non-transitory computer-readable medium as in claim 15 , the operation further comprising:

performing prioritized inline polling of the hardware accelerator at a shortened polling interval in response to determining that the hardware accelerator has not completed compressing or decompressing the data segment.

Assignments (10)
RELEASE OF SECURITY INTEREST IN PATENTS PREVIOUSLY RECORDED AT REEL/FRAME (056295/0280) Recorded Jun 10, 2022
From: THE BANK OF NEW YORK MELLON TRUST COMPANY, N.A., AS NOTES COLLATERAL AGENT
To: DELL PRODUCTS L.P.; EMC IP HOLDING COMPANY LLC
Reel/Frame 062022/0255 →
RELEASE OF SECURITY INTEREST IN PATENTS PREVIOUSLY RECORDED AT REEL/FRAME (056295/0124) Recorded Jun 10, 2022
From: THE BANK OF NEW YORK MELLON TRUST COMPANY, N.A., AS NOTES COLLATERAL AGENT
To: DELL PRODUCTS L.P.; EMC IP HOLDING COMPANY LLC
Reel/Frame 062022/0012 →
RELEASE OF SECURITY INTEREST IN PATENTS PREVIOUSLY RECORDED AT REEL/FRAME (056295/0001) Recorded Jun 10, 2022
From: THE BANK OF NEW YORK MELLON TRUST COMPANY, N.A., AS NOTES COLLATERAL AGENT
To: DELL PRODUCTS L.P.; EMC IP HOLDING COMPANY LLC
Reel/Frame 062021/0844 →
RELEASE OF SECURITY INTEREST Recorded Nov 2, 2021
From: CREDIT SUISSE AG, CAYMAN ISLANDS BRANCH
To: DELL PRODUCTS L.P.; EMC IP HOLDING COMPANY LLC
Reel/Frame 058297/0332 →
SECURITY INTEREST Recorded May 19, 2021
From: DELL PRODUCTS L.P.; EMC IP HOLDING COMPANY LLC
To: THE BANK OF NEW YORK MELLON TRUST COMPANY, N.A., AS NOTES COLLATERAL AGENT
Reel/Frame 056295/0124 →
SECURITY INTEREST Recorded May 19, 2021
From: DELL PRODUCTS L.P.; EMC IP HOLDING COMPANY LLC
To: THE BANK OF NEW YORK MELLON TRUST COMPANY, N.A., AS NOTES COLLATERAL AGENT
Reel/Frame 056295/0001 →
SECURITY INTEREST Recorded May 19, 2021
From: DELL PRODUCTS L.P.; EMC IP HOLDING COMPANY LLC
To: THE BANK OF NEW YORK MELLON TRUST COMPANY, N.A., AS NOTES COLLATERAL AGENT
Reel/Frame 056295/0280 →
CORRECTIVE ASSIGNMENT TO CORRECT THE MISSING PATENTS THAT WERE ON THE ORIGINAL SCHEDULED SUBMITTED BUT NOT ENTERED PREVIOUSLY RECORDED AT REEL: 056250 FRAME: 0541. ASSIGNOR(S) HEREBY CONFIRMS THE ASSIGNMENT. Recorded May 17, 2021
From: DELL PRODUCTS L.P.; EMC IP HOLDING COMPANY LLC
To: CREDIT SUISSE AG, CAYMAN ISLANDS BRANCH
Reel/Frame 056311/0781 →
SECURITY AGREEMENT Recorded May 14, 2021
From: DELL PRODUCTS L.P.; EMC IP HOLDING COMPANY LLC
To: CREDIT SUISSE AG, CAYMAN ISLANDS BRANCH
Reel/Frame 056250/0541 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Feb 25, 2021
From: GONG, SHUGUANG; ZOU, COLIN; CHEN, TAO
To: EMC IP HOLDING COMPANY LLC
Reel/Frame 055409/0096 →